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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-03-24 00:09:14 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-11 06:01:59 +0000 |
| commit | a74504b729eb52e898487e9f124ed054e88f7927 (patch) | |
| tree | 244e504d4472ebb35d174a3c99a55884a4298f3e /src | |
| parent | e2ffcc6068cb278689fc656742fa61a38ebe9fe4 (diff) | |
| download | coreboot-a74504b729eb52e898487e9f124ed054e88f7927.tar.gz coreboot-a74504b729eb52e898487e9f124ed054e88f7927.tar.bz2 coreboot-a74504b729eb52e898487e9f124ed054e88f7927.zip | |
mb/*/bootblock.c: Fix set but unused variable over inb loop
Change-Id: Iba80c4a5960c6fb59f542b33e8e769576ccfed59
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63060
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/amd/olivehill/bootblock.c | 3 | ||||
| -rw-r--r-- | src/mainboard/asus/am1i-a/bootblock.c | 4 |
2 files changed, 3 insertions, 4 deletions
diff --git a/src/mainboard/amd/olivehill/bootblock.c b/src/mainboard/amd/olivehill/bootblock.c index efdf57d1c28b..319914fe7bd9 100644 --- a/src/mainboard/amd/olivehill/bootblock.c +++ b/src/mainboard/amd/olivehill/bootblock.c @@ -7,12 +7,11 @@ void bootblock_mainboard_early_init(void) { int i; - u32 val; /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */ pm_write8(0xea, 0x1); /* On Larne, after LpcClkDrvSth is set, it needs some time to be stable, because of the buffer ICS551M */ for (i = 0; i < 200000; i++) - val = inb(0xcd6); + inb(0xcd6); } diff --git a/src/mainboard/asus/am1i-a/bootblock.c b/src/mainboard/asus/am1i-a/bootblock.c index 6e71962cee49..b465a55f441e 100644 --- a/src/mainboard/asus/am1i-a/bootblock.c +++ b/src/mainboard/asus/am1i-a/bootblock.c @@ -103,7 +103,7 @@ static void ite_gpio_conf(pnp_devfn_t dev) void bootblock_mainboard_early_init(void) { - u32 val, i; + u32 i; /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */ pm_write8(0xea, 0x1); @@ -128,5 +128,5 @@ void bootblock_mainboard_early_init(void) * because of the buffer ICS551M */ for (i = 0; i < 200000; i++) - val = inb(0xcd6); + inb(0xcd6); } |