diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-10 16:13:56 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-11 16:16:29 +0000 |
| commit | aa77d1364f3e1cce0ee9f06b30b1a5ffc6d8321e (patch) | |
| tree | 530ac606f1a98be057a2698e7d22d38ef4755033 /src | |
| parent | 68bcc083bde5135aa0d52b11d62d6ec74947cde5 (diff) | |
| download | coreboot-aa77d1364f3e1cce0ee9f06b30b1a5ffc6d8321e.tar.gz coreboot-aa77d1364f3e1cce0ee9f06b30b1a5ffc6d8321e.tar.bz2 coreboot-aa77d1364f3e1cce0ee9f06b30b1a5ffc6d8321e.zip | |
soc/amd/cezanne/cpu: add basic zen_2_3_init functionality
The MCA MSRs aren't getting cleared and no microcode update gets applied
for now. Both will be added later.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I38ce5d11787ffefdd0183c5540ae2683158cbee8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50482
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/cezanne/cpu.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/cpu.c b/src/soc/amd/cezanne/cpu.c index 3e0a7dbbd870..cd2d6ed4b121 100644 --- a/src/soc/amd/cezanne/cpu.c +++ b/src/soc/amd/cezanne/cpu.c @@ -1,12 +1,16 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <amdblocks/cpu.h> #include <console/console.h> #include <cpu/cpu.h> +#include <cpu/x86/lapic.h> #include <device/device.h> #include <soc/cpu.h> static void zen_2_3_init(struct device *dev) { + setup_lapic(); + set_cstate_io_addr(); } static struct device_operations cpu_dev_ops = { |