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authorJon Murphy <jpmurphy@google.com>2023-03-29 17:05:47 -0600
committerFelix Held <felix-coreboot@felixheld.de>2023-04-12 14:14:48 +0000
commitb27495d0faee5ea53a5067be2de7ec038010433a (patch)
tree47f48bcd4ec740ac33c81d4cc84114a0db1c700d /src
parent9a2d0e6bc2d27274af87e01de61456d77edd54be (diff)
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mb/google/myst: Add FW_CONFIG
Add initial FW_CONFIG for the myst program. BUG=b: TEST=builds Cq-Depend: chrome-internal:5674351 Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: If74c3649d4e8d174d9fe00a4b896c2351ee3ab19 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74102 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/myst/Kconfig2
-rw-r--r--src/mainboard/google/myst/variants/myst/overridetree.cb29
2 files changed, 31 insertions, 0 deletions
diff --git a/src/mainboard/google/myst/Kconfig b/src/mainboard/google/myst/Kconfig
index 59eabe4d9c10..0305e25cadbb 100644
--- a/src/mainboard/google/myst/Kconfig
+++ b/src/mainboard/google/myst/Kconfig
@@ -10,6 +10,8 @@ config BOARD_SPECIFIC_OPTIONS
select BOARD_ROMSIZE_KB_16384
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_ESPI
+ select FW_CONFIG
+ select FW_CONFIG_SOURCE_CHROMEEC_CBI
select MAINBOARD_HAS_CHROMEOS
select SOC_AMD_PHOENIX
diff --git a/src/mainboard/google/myst/variants/myst/overridetree.cb b/src/mainboard/google/myst/variants/myst/overridetree.cb
index 164a47ad7fd0..989a17ccb961 100644
--- a/src/mainboard/google/myst/variants/myst/overridetree.cb
+++ b/src/mainboard/google/myst/variants/myst/overridetree.cb
@@ -1,4 +1,33 @@
# SPDX-License-Identifier: GPL-2.0-or-later
+fw_config
+ field FORM_FACTOR 0
+ option FORM_FACTOR_CLAMSHELL 0
+ option FORM_FACTOR_CONVERTIBLE 1
+ end
+ field FP 1 2
+ option DISABLED 0
+ option UART 1
+ option SPI 2
+ end
+ field WLAN 3 4
+ option WLAN_MT7922 0
+ option WLAN_MT7925 1
+ end
+ field WWAN 5 6
+ option WWAN_DIASABLED 0
+ option WWAN_FM101GL 1
+ end
+ field DAUGHTERBOARD 7 9
+ option DISABLED 0
+ option DB_A 1
+ option DB_B 2
+ end
+ field KB_BL 10
+ option DISABLED 0
+ option ENABLED 1
+ end
+end
+
chip soc/amd/phoenix
device domain 0 on end # domain
end # chip soc/amd/phoenix