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authorJamie Ryu <jamie.m.ryu@intel.com>2022-08-03 01:13:33 -0700
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-08-24 15:59:40 +0000
commitb6c32d7fe4ea98ba8b3a10cb5ce46448801855b8 (patch)
treee6529bc93f3f22bf00a7c049137f31a59e0eccdb /src
parent4b8092aebbcf2316a0b34d340f18bf7d4ae02ed5 (diff)
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soc/intel/meteorlake: Enable GPIO 4 bits pad mode configuration
This enables SOC_INTEL_COMMON_BLOCK_GPIO_PMODE_4BITS to support 4 bits GPIO pad mode to configure native function 8 to 15. BUG=b:239690757 TEST=build and verify pad mode configuration with Meteor Lake mtlrvp Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Change-Id: Ibf4b13a3d19095d15bf857c7fe4ec0affb54a4e8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66391 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/meteorlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 0550d734efd1..f15871fe0bec 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -56,6 +56,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_DTT
select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
select SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_PCR
+ select SOC_INTEL_COMMON_BLOCK_GPIO_PMODE_4BITS
select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
select SOC_INTEL_COMMON_BLOCK_HDA
select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC if DISABLE_HECI1_AT_PRE_BOOT