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| author | Tim Chu <Tim.Chu@quantatw.com> | 2020-11-13 03:04:54 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-22 22:31:58 +0000 |
| commit | be34afad6fe2660919f488402cfcf685fdd47300 (patch) | |
| tree | 24a7d5ec04f42930f361f38976c43858cdabcea3 /src | |
| parent | b01ac7e26453677318776885d4ab870f59553ae6 (diff) | |
| download | coreboot-be34afad6fe2660919f488402cfcf685fdd47300.tar.gz coreboot-be34afad6fe2660919f488402cfcf685fdd47300.tar.bz2 coreboot-be34afad6fe2660919f488402cfcf685fdd47300.zip | |
mb/ocp/deltalake: Override SMBIOS type 4 cpu voltage
Override SMBIOS type 4 cpu voltage. For Delta Lake, 1.6V is expected.
Tested=Execute "dmidecode -t 4" to check if cpu voltage is correct.
Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Change-Id: I0ecbec8fb3dc79b8c3f3581d6193aade01bcd68e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47562
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/ocp/deltalake/ramstage.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c index 9d570900b1c8..52c55b89b0ea 100644 --- a/src/mainboard/ocp/deltalake/ramstage.c +++ b/src/mainboard/ocp/deltalake/ramstage.c @@ -59,6 +59,18 @@ const char *smbios_mainboard_location_in_chassis(void) return slot_id_str; } +/* + * Override SMBIOS type 4 cpu voltage. + * BIT7 will set to 1 after value return. If BIT7 is set to 1, the remaining seven + * bits of this field are set to contain the processor's current voltage times 10. + */ +unsigned int smbios_cpu_get_voltage(void) +{ + /* This will return 1.6V which is expected value for Delta Lake + 10h = (1.6 * 10) = 16 */ + return 0x10; +} + /* System Slot Socket, Stack, Type and Data bus width Information */ typedef struct { u8 stack; |