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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-18 14:02:57 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-10-19 17:19:39 +0000 |
| commit | bf6b6afa9e3e087d7c4d58c32d0a1e21741baa10 (patch) | |
| tree | 93279333bdba4bf9d7bf179e8e4ce87b160fbd9a /src | |
| parent | 4cb888e946bf3372373a689af54201b2a0a6871e (diff) | |
| download | coreboot-bf6b6afa9e3e087d7c4d58c32d0a1e21741baa10.tar.gz coreboot-bf6b6afa9e3e087d7c4d58c32d0a1e21741baa10.tar.bz2 coreboot-bf6b6afa9e3e087d7c4d58c32d0a1e21741baa10.zip | |
mb/lenovo/x200/dock.c: Use common southbridge gpio code
Change-Id: I5b527a23aa0b0038936bb4b77176331fdfd6d914
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36127
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/lenovo/x200/dock.c | 20 |
1 files changed, 5 insertions, 15 deletions
diff --git a/src/mainboard/lenovo/x200/dock.c b/src/mainboard/lenovo/x200/dock.c index d5f774bb48e8..233b134702bb 100644 --- a/src/mainboard/lenovo/x200/dock.c +++ b/src/mainboard/lenovo/x200/dock.c @@ -15,21 +15,14 @@ * GNU General Public License for more details. */ -#define __SIMPLE_DEVICE__ - #include <console/console.h> -#include <arch/io.h> -#include <device/pci_ops.h> #include <device/device.h> -#include <device/pci.h> -#include <southbridge/intel/i82801ix/i82801ix.h> +#include <southbridge/intel/common/gpio.h> #include <ec/lenovo/h8/h8.h> #include <ec/acpi/ec.h> #include "dock.h" -#define LPC_DEV PCI_DEV(0, 0x1f, 0) - void h8_mainboard_init_dock (void) { if (dock_present()) { @@ -41,22 +34,19 @@ void h8_mainboard_init_dock (void) void dock_connect(void) { - u16 gpiobase = pci_read_config16(LPC_DEV, D31F0_GPIO_BASE) & 0xfffc; ec_set_bit(0x02, 0); - outl(inl(gpiobase + 0x0c) | (1 << 28), gpiobase + 0x0c); + set_gpio(28, GPIO_LEVEL_HIGH); } void dock_disconnect(void) { - u16 gpiobase = pci_read_config16(LPC_DEV, D31F0_GPIO_BASE) & 0xfffc; ec_clr_bit(0x02, 0); - outl(inl(gpiobase + 0x0c) & ~(1 << 28), gpiobase + 0x0c); + set_gpio(28, GPIO_LEVEL_LOW); } int dock_present(void) { - u16 gpiobase = pci_read_config16(LPC_DEV, D31F0_GPIO_BASE) & 0xfffc; - u8 st = inb(gpiobase + 0x0c); + const int dock_id_gpio[] = { 2, 3, 4, -1}; - return ((st >> 2) & 7) != 7; + return get_gpios(dock_id_gpio) != 7; } |