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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-07 15:17:04 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-12 15:47:06 +0100 |
| commit | bfdb8937b27700546bc233287c657e2f634a3177 (patch) | |
| tree | b15370717de3a6f0f578cff1d575f0b53383cd9b /src | |
| parent | 6625ecc3448b59b6adde3f10674cd578f06f786f (diff) | |
| download | coreboot-bfdb8937b27700546bc233287c657e2f634a3177.tar.gz coreboot-bfdb8937b27700546bc233287c657e2f634a3177.tar.bz2 coreboot-bfdb8937b27700546bc233287c657e2f634a3177.zip | |
src/include: Remove braces for single statements
Fix the following warning detected by checkpatch.pl:
WARNING: braces {} are not necessary for single statement blocks
TEST=Build and run on Galileo Gen2
Change-Id: I00b59f6a27c3acb393deaa763596363b7e958efd
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18654
Tested-by: build bot (Jenkins)
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
| -rw-r--r-- | src/include/cpu/amd/model_fxx_rev.h | 6 | ||||
| -rw-r--r-- | src/include/device/pci.h | 3 | ||||
| -rw-r--r-- | src/include/pc80/mc146818rtc.h | 6 | ||||
| -rw-r--r-- | src/include/string.h | 6 |
4 files changed, 7 insertions, 14 deletions
diff --git a/src/include/cpu/amd/model_fxx_rev.h b/src/include/cpu/amd/model_fxx_rev.h index e34b4ed649c6..210a65227ebc 100644 --- a/src/include/cpu/amd/model_fxx_rev.h +++ b/src/include/cpu/amd/model_fxx_rev.h @@ -74,9 +74,8 @@ static inline int is_e0_later_in_bsp(int nodeid) return 1; // we don't need to do that for node 0 in core0/node0 - if (nodeid == 0) { + if (nodeid == 0) return !is_cpu_pre_e0(); - } // d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0 pci_devfn_t dev; @@ -89,9 +88,8 @@ static inline int is_e0_later_in_bsp(int nodeid) e0_later = !!(val & (1<<3)); // pre_e0 bit 3 always be 0 and can not be changed - if (e0_later) { + if (e0_later) pci_write_config32(dev, 0x80, val_old); // restore it - } return e0_later; } diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 13d63d4f6c63..e18a09afe091 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -103,9 +103,8 @@ static inline const struct pci_operations *ops_pci(device_t dev) { const struct pci_operations *pops; pops = 0; - if (dev && dev->ops) { + if (dev && dev->ops) pops = dev->ops->ops_pci; - } return pops; } diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 39f58d601543..be90358b05ae 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -140,14 +140,12 @@ static inline void cmos_write(unsigned char val, unsigned char addr) * eg. the Century / AltCentury byte. So to be safe, disable * RTC before changing any value. */ - if ((addr != RTC_CONTROL) && !(control_state & RTC_SET)) { + if ((addr != RTC_CONTROL) && !(control_state & RTC_SET)) cmos_write_inner(control_state | RTC_SET, RTC_CONTROL); - } cmos_write_inner(val, addr); /* reset to prior configuration */ - if ((addr != RTC_CONTROL) && !(control_state & RTC_SET)) { + if ((addr != RTC_CONTROL) && !(control_state & RTC_SET)) cmos_write_inner(control_state, RTC_CONTROL); - } } static inline void cmos_disable_rtc(void) diff --git a/src/include/string.h b/src/include/string.h index f2777a9e4987..d547e49fff4f 100644 --- a/src/include/string.h +++ b/src/include/string.h @@ -24,18 +24,16 @@ int snprintf(char * buf, size_t size, const char *fmt, ...); static inline size_t strnlen(const char *src, size_t max) { size_t i = 0; - while ((*src++) && (i < max)) { + while ((*src++) && (i < max)) i++; - } return i; } static inline size_t strlen(const char *src) { size_t i = 0; - while (*src++) { + while (*src++) i++; - } return i; } |