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| author | Nico Huber <nico.huber@secunet.com> | 2019-02-08 16:09:57 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-11 12:27:20 +0000 |
| commit | c9e33573c1b517879ce1199fec98220f0e401076 (patch) | |
| tree | 2dcf727c76421cdfa136e80605d493b40ddcc828 /src | |
| parent | 8ab17520700741b82fe5eff3b44a48f5bf86f57c (diff) | |
| download | coreboot-c9e33573c1b517879ce1199fec98220f0e401076.tar.gz coreboot-c9e33573c1b517879ce1199fec98220f0e401076.tar.bz2 coreboot-c9e33573c1b517879ce1199fec98220f0e401076.zip | |
Revert "cpu/x86/mtrr: Fix sign overflow"
This reverts commit 6bbc8d8050b1d51ec4bf15003a2da54e20d476c7.
The macro is used in assembly where integer suffixes are not portable.
Also, it is unclear how this can overflow as it's already the macros
purpose to avoid the overflow.
Change-Id: I12c9bfe40891ae3afbfda05f60a20b59e2954aed
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/31290
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/include/cpu/x86/mtrr.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index 0398a2e1b0b7..eb7d78d1c57d 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -150,7 +150,7 @@ static inline unsigned int fls(unsigned int x) #define _ALIGN_DOWN_POW2(x) ((x) & ~_POW2_MASK(x)) /* Calculate `4GiB - x` (e.g. absolute address for offset from 4GiB) */ -#define _FROM_4G_TOP(x) (((1UL << 20) - ((x) >> 12)) << 12) +#define _FROM_4G_TOP(x) (((1 << 20) - ((x) >> 12)) << 12) /* At the end of romstage, low RAM 0..CACHE_TM_RAMTOP may be set * as write-back cacheable to speed up ramstage decompression. |