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| author | Sudheer Kumar Amrabadi <samrabad@codeaurora.org> | 2022-05-09 18:20:19 +0530 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2022-06-01 18:05:38 +0000 |
| commit | cc4dd88d2b21551f842302751255c6704b28bc52 (patch) | |
| tree | f959f809a26d26af7ff964d049d78d7b27c20124 /src | |
| parent | cc6a7667641a6a4fa547444a4d6aa2d3d000112e (diff) | |
| download | coreboot-cc4dd88d2b21551f842302751255c6704b28bc52.tar.gz coreboot-cc4dd88d2b21551f842302751255c6704b28bc52.tar.bz2 coreboot-cc4dd88d2b21551f842302751255c6704b28bc52.zip | |
sc7180: Trogdor to support 2 dcb
BUG=b:227946776
TEST=Validated on sc7180 Lazor board
Signed-off-by: Sudheer Kumar Amrabadi <quic_samrabad@quicinc.com>
Change-Id: Ie4d7f7f0b24aee06ffb272b21b74fea4160fe87c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64244
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/qualcomm/sc7180/Makefile.inc | 9 | ||||
| -rw-r--r-- | src/soc/qualcomm/sc7180/qclib.c | 26 |
2 files changed, 35 insertions, 0 deletions
diff --git a/src/soc/qualcomm/sc7180/Makefile.inc b/src/soc/qualcomm/sc7180/Makefile.inc index cbdc5b32518a..c8d7f2f78d8e 100644 --- a/src/soc/qualcomm/sc7180/Makefile.inc +++ b/src/soc/qualcomm/sc7180/Makefile.inc @@ -27,6 +27,7 @@ verstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c romstage-y += cbmem.c romstage-y += watchdog.c romstage-y += ../common/qclib.c +romstage-y += qclib.c romstage-y += ../common/mmu.c romstage-y += mmu.c romstage-y += ../common/usb/usb.c @@ -97,6 +98,14 @@ $(DCB_CBFS)-compression := $(CBFS_COMPRESS_FLAG) cbfs-files-y += $(DCB_CBFS) ################################################################################ +DCB_LONGSYS1P8_FILE := $(SC7180_BLOB)/boot/dcb_slow.bin +DCB_LONGSYS1P8_CBFS := $(CONFIG_CBFS_PREFIX)/dcb_longsys1p8 +$(DCB_LONGSYS1P8_CBFS)-file := $(DCB_LONGSYS1P8_FILE) +$(DCB_LONGSYS1P8_CBFS)-type := raw +$(DCB_LONGSYS1P8_CBFS)-compression := $(CBFS_COMPRESS_FLAG) +cbfs-files-y += $(DCB_LONGSYS1P8_CBFS) + +################################################################################ AOP_FILE := $(SC7180_BLOB)/aop/aop.mbn AOP_CBFS := $(CONFIG_CBFS_PREFIX)/aop $(AOP_CBFS)-file := $(AOP_FILE) diff --git a/src/soc/qualcomm/sc7180/qclib.c b/src/soc/qualcomm/sc7180/qclib.c new file mode 100644 index 000000000000..e05a24f029af --- /dev/null +++ b/src/soc/qualcomm/sc7180/qclib.c @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <soc/qclib_common.h> +#include <device/mmio.h> + +#define LONG_SYS_DCB_REG 0x7801C0 +#define FUSE_BIT 15 + +static int dcb_fuse_longsys1p8(void) +{ + unsigned int fuse_value, bit_value; + fuse_value = read32((unsigned int *)LONG_SYS_DCB_REG); + bit_value = (fuse_value >> FUSE_BIT) & 0x1; + return bit_value; +} + +const char *qclib_file(enum qclib_cbfs_file file) +{ + if ((file == QCLIB_CBFS_DCB) && dcb_fuse_longsys1p8()) { + printk(BIOS_INFO, "Using DCB for Longsys 1.8V memory based on fuse setting\n"); + return CONFIG_CBFS_PREFIX "/dcb_longsys1p8"; + } else { + return qclib_file_default(file); + } +} |