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author | Furquan Shaikh <furquan@google.com> | 2020-05-13 12:22:53 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2020-05-14 21:27:34 +0000 |
commit | cd6804cd16630ce672df7d8e52b7b4c628e4a3da (patch) | |
tree | 0b673f2915ce8255cb79133e3ef1eeee0b6bfee9 /src | |
parent | d6973e811b925901e045f3f229a45c16d8dcbcca (diff) | |
download | coreboot-cd6804cd16630ce672df7d8e52b7b4c628e4a3da.tar.gz coreboot-cd6804cd16630ce672df7d8e52b7b4c628e4a3da.tar.bz2 coreboot-cd6804cd16630ce672df7d8e52b7b4c628e4a3da.zip |
samsung/exynos5420: add resources during read_resources()
The chipset code was incorrectly adding memory resources
to the domain device after resource allocation occurred.
It's not possible to get the correct view of the address space,
and it's generally incorrect to not add resources during
read_resources(). This change fixes the order by adding resources in
read_resources().
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I49ce6ac88c4cb7cd05ff9d78133593ce97304596
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41374
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/samsung/exynos5420/cpu.c | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/src/soc/samsung/exynos5420/cpu.c b/src/soc/samsung/exynos5420/cpu.c index 8a07552cf69c..6d1418a5453c 100644 --- a/src/soc/samsung/exynos5420/cpu.c +++ b/src/soc/samsung/exynos5420/cpu.c @@ -97,8 +97,6 @@ static void exynos_displayport_init(struct device *dev, u32 lcdbase, dcache_clean_invalidate_by_mva((void *)lower, upper - lower); mmu_config_range(lower / MiB, (upper - lower) / MiB, DCACHE_OFF); - - mmio_resource(dev, 1, lcdbase/KiB, DIV_ROUND_UP(fb_size, KiB)); } static void tps65090_thru_ec_fet_disable(int index) @@ -117,9 +115,6 @@ static void cpu_enable(struct device *dev) unsigned long fb_size = FB_SIZE_KB * KiB; u32 lcdbase = get_fb_base_kb() * KiB; - ram_resource(dev, 0, RAM_BASE_KB, RAM_SIZE_KB - FB_SIZE_KB); - mmio_resource(dev, 1, lcdbase / KiB, DIV_ROUND_UP(fb_size, KiB)); - /* * Disable LCD FETs before we do anything with the display. * FIXME(dhendrix): This is a gross hack and should be done @@ -133,6 +128,15 @@ static void cpu_enable(struct device *dev) set_cpu_id(); } +static void cpu_read_resources(struct device *dev) +{ + unsigned long fb_size = FB_SIZE_KB * KiB; + u32 lcdbase = get_fb_base_kb() * KiB; + + ram_resource(dev, 0, RAM_BASE_KB, RAM_SIZE_KB - FB_SIZE_KB); + mmio_resource(dev, 1, lcdbase / KiB, DIV_ROUND_UP(fb_size, KiB)); +} + static void cpu_init(struct device *dev) { printk(BIOS_INFO, "CPU: S5P%X @ %ldMHz\n", @@ -140,7 +144,7 @@ static void cpu_init(struct device *dev) } static struct device_operations cpu_ops = { - .read_resources = noop_read_resources, + .read_resources = cpu_read_resources, .set_resources = noop_set_resources, .enable_resources = cpu_enable, .init = cpu_init, |