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| author | Angel Pons <th3fanbus@gmail.com> | 2020-11-14 01:12:24 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-11-20 00:33:39 +0000 |
| commit | cf5dd49d3c9a513d379c0210fa7c7a6f5c52ff36 (patch) | |
| tree | 43846a8ce6a219bbe37178ef20bf7ee41b05d2df /src | |
| parent | 60971dcd01ba52685690fd6bf39e6fe2a8cbdb88 (diff) | |
| download | coreboot-cf5dd49d3c9a513d379c0210fa7c7a6f5c52ff36.tar.gz coreboot-cf5dd49d3c9a513d379c0210fa7c7a6f5c52ff36.tar.bz2 coreboot-cf5dd49d3c9a513d379c0210fa7c7a6f5c52ff36.zip | |
nb/intel/sandybridge: Replace and-zero with assignment
The intent here is to clear the register, so a simple write will work.
Change-Id: I547805059e911942ac2cac7bd2165af23d926a2b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47608
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 0eb966d2fddb..971d692d4c0e 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -2026,7 +2026,7 @@ int write_training(ramctr_timing *ctrl) printram("CPF\n"); FOR_ALL_CHANNELS FOR_ALL_POPULATED_RANKS FOR_ALL_LANES { - MCHBAR32_AND(IOSAV_By_BW_MASK_ch(channel, lane), 0); + MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; } FOR_ALL_POPULATED_CHANNELS { @@ -2049,7 +2049,7 @@ int write_training(ramctr_timing *ctrl) program_timings(ctrl, channel); FOR_ALL_CHANNELS FOR_ALL_POPULATED_RANKS FOR_ALL_LANES { - MCHBAR32_AND(IOSAV_By_BW_MASK_ch(channel, lane), 0); + MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; } return 0; } |