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| author | Vladimir Serbinenko <phcoder@gmail.com> | 2015-06-08 20:06:48 +0200 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2015-06-10 05:33:36 +0200 |
| commit | efc01f0d22dc72c9c156740cf334ee8ac2cfe6cd (patch) | |
| tree | 5c7c6ed4d6cfce62c8b2ee1d6faa5e9f752c4467 /src | |
| parent | f34082c0e3a6333e2a4cfc8c7715ecef552ac5a1 (diff) | |
| download | coreboot-efc01f0d22dc72c9c156740cf334ee8ac2cfe6cd.tar.gz coreboot-efc01f0d22dc72c9c156740cf334ee8ac2cfe6cd.tar.bz2 coreboot-efc01f0d22dc72c9c156740cf334ee8ac2cfe6cd.zip | |
model_206ax: Fix APIC map when HT is disabled.
Change-Id: Idd05a16bd9bd31438437ef229aa87f55da8489fb
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10467
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/intel/fsp_model_206ax/model_206ax_init.c | 24 | ||||
| -rw-r--r-- | src/cpu/intel/model_206ax/model_206ax_init.c | 24 |
2 files changed, 30 insertions, 18 deletions
diff --git a/src/cpu/intel/fsp_model_206ax/model_206ax_init.c b/src/cpu/intel/fsp_model_206ax/model_206ax_init.c index bcff1e842dc9..9b76c22aa246 100644 --- a/src/cpu/intel/fsp_model_206ax/model_206ax_init.c +++ b/src/cpu/intel/fsp_model_206ax/model_206ax_init.c @@ -36,8 +36,6 @@ #include "chip.h" #include <cpu/intel/smm/gen1/smi.h> -#define CORE_THREAD_COUNT_MSR 0x35 - static void enable_vmx(void) { struct cpuid_result regs; @@ -291,16 +289,24 @@ static void configure_mca(void) int cpu_get_apic_id_map(int *apic_id_map) { - msr_t msr; - int num_cpus, i; + struct cpuid_result result; + unsigned threads_per_package, threads_per_core, i, shift = 0; + + /* Logical processors (threads) per core */ + result = cpuid_ext(0xb, 0); + threads_per_core = result.ebx & 0xffff; + + /* Logical processors (threads) per package */ + result = cpuid_ext(0xb, 1); + threads_per_package = result.ebx & 0xffff; - msr = rdmsr(CORE_THREAD_COUNT_MSR); - num_cpus = msr.lo & 0xffff; + if (threads_per_core == 1) + shift++; - for (i = 0; i < num_cpus && i < CONFIG_MAX_CPUS; i++) - apic_id_map[i] = i; + for (i = 0; i < threads_per_package && i < CONFIG_MAX_CPUS; i++) + apic_id_map[i] = i << shift; - return num_cpus; + return threads_per_package; } /* diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 2028af019613..922eb495389a 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -37,8 +37,6 @@ #include "chip.h" #include <cpu/intel/smm/gen1/smi.h> -#define CORE_THREAD_COUNT_MSR 0x35 - /* * List of supported C-states in this processor * @@ -478,16 +476,24 @@ static void configure_mca(void) int cpu_get_apic_id_map(int *apic_id_map) { - msr_t msr; - int num_cpus, i; + struct cpuid_result result; + unsigned threads_per_package, threads_per_core, i, shift = 0; + + /* Logical processors (threads) per core */ + result = cpuid_ext(0xb, 0); + threads_per_core = result.ebx & 0xffff; + + /* Logical processors (threads) per package */ + result = cpuid_ext(0xb, 1); + threads_per_package = result.ebx & 0xffff; - msr = rdmsr(CORE_THREAD_COUNT_MSR); - num_cpus = msr.lo & 0xffff; + if (threads_per_core == 1) + shift++; - for (i = 0; i < num_cpus && i < CONFIG_MAX_CPUS; i++) - apic_id_map[i] = i; + for (i = 0; i < threads_per_package && i < CONFIG_MAX_CPUS; i++) + apic_id_map[i] = i << shift; - return num_cpus; + return threads_per_package; } /* |