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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-14 23:47:33 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-21 10:48:18 +0000 |
| commit | f6940886f9aa9133c0fa4e1599c257b1a67be376 (patch) | |
| tree | a2e76669897a4240e4e5a4ea97c9c75f23690217 /src | |
| parent | 5a38572fd99b7a9e86170efddc14960a7f37a748 (diff) | |
| download | coreboot-f6940886f9aa9133c0fa4e1599c257b1a67be376.tar.gz coreboot-f6940886f9aa9133c0fa4e1599c257b1a67be376.tar.bz2 coreboot-f6940886f9aa9133c0fa4e1599c257b1a67be376.zip | |
mb/*/chromeos.c: Be explicit about code for ramstage
Motivation is to reduce use of !__PRE_RAM__, it does not
mean ENV_RAMSTAGE but we also exclude ENV_SMM with the change.
Change-Id: I1f96bb8c055a3da63274e1ab7f7d4bc70867cbf1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/beltino/chromeos.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/butterfly/chromeos.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/jecht/chromeos.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/parrot/chromeos.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/stout/chromeos.c | 2 | ||||
| -rw-r--r-- | src/mainboard/intel/baskingridge/chromeos.c | 2 | ||||
| -rw-r--r-- | src/mainboard/intel/emeraldlake2/chromeos.c | 2 | ||||
| -rw-r--r-- | src/mainboard/samsung/lumpy/chromeos.c | 2 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/chromeos.c | 2 |
9 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/google/beltino/chromeos.c b/src/mainboard/google/beltino/chromeos.c index c6b0db282159..dfa93a263d6f 100644 --- a/src/mainboard/google/beltino/chromeos.c +++ b/src/mainboard/google/beltino/chromeos.c @@ -28,7 +28,7 @@ #define FLAG_REC_MODE 1 #define FLAG_DEV_MODE 2 -#ifndef __PRE_RAM__ +#if ENV_RAMSTAGE #include <boot/coreboot_tables.h> void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c index 4108e31bbf60..11b28cde90c8 100644 --- a/src/mainboard/google/butterfly/chromeos.c +++ b/src/mainboard/google/butterfly/chromeos.c @@ -30,7 +30,7 @@ #define DEVMODE_GPIO 54 #define FORCE_RECOVERY_MODE 0 -#ifndef __PRE_RAM__ +#if ENV_RAMSTAGE #include <boot/coreboot_tables.h> #define GPIO_COUNT 6 diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c index 05c8a3e298a2..548470ecff40 100644 --- a/src/mainboard/google/jecht/chromeos.c +++ b/src/mainboard/google/jecht/chromeos.c @@ -29,7 +29,7 @@ #define FLAG_REC_MODE 1 #define FLAG_DEV_MODE 2 -#ifndef __PRE_RAM__ +#if ENV_RAMSTAGE #include <boot/coreboot_tables.h> void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c index 6e6a4dee0303..1420bf584d6e 100644 --- a/src/mainboard/google/parrot/chromeos.c +++ b/src/mainboard/google/parrot/chromeos.c @@ -27,7 +27,7 @@ #include "ec.h" -#ifndef __PRE_RAM__ +#if ENV_RAMSTAGE #include <boot/coreboot_tables.h> #define GPIO_COUNT 6 diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c index 6a4be31fa4b9..d366e408228f 100644 --- a/src/mainboard/google/stout/chromeos.c +++ b/src/mainboard/google/stout/chromeos.c @@ -26,7 +26,7 @@ #include "ec.h" #include <ec/quanta/it8518/ec.h> -#ifndef __PRE_RAM__ +#if ENV_RAMSTAGE #include <boot/coreboot_tables.h> #define GPIO_COUNT 7 diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c index 69e105010188..1c62e5e0eb3e 100644 --- a/src/mainboard/intel/baskingridge/chromeos.c +++ b/src/mainboard/intel/baskingridge/chromeos.c @@ -23,7 +23,7 @@ #include <southbridge/intel/common/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> -#ifndef __PRE_RAM__ +#if ENV_RAMSTAGE #include <boot/coreboot_tables.h> #define GPIO_COUNT 6 diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c index 24f887598f3e..8c0aeea4d1e9 100644 --- a/src/mainboard/intel/emeraldlake2/chromeos.c +++ b/src/mainboard/intel/emeraldlake2/chromeos.c @@ -23,7 +23,7 @@ #include <southbridge/intel/common/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> -#ifndef __PRE_RAM__ +#if ENV_RAMSTAGE #include <boot/coreboot_tables.h> #define GPIO_COUNT 6 diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index baa409472de7..0dba27a64497 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -31,7 +31,7 @@ #define FLAG_REC_MODE 1 #define FLAG_DEV_MODE 2 -#ifndef __SIMPLE_DEVICE__ +#if ENV_RAMSTAGE #include <boot/coreboot_tables.h> #include "ec.h" #include <ec/smsc/mec1308/ec.h> diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c index 85f903842865..d0554447d2ed 100644 --- a/src/mainboard/samsung/stumpy/chromeos.c +++ b/src/mainboard/samsung/stumpy/chromeos.c @@ -30,7 +30,7 @@ #define FLAG_REC_MODE 1 #define FLAG_DEV_MODE 2 -#ifndef __PRE_RAM__ +#if ENV_RAMSTAGE #include <boot/coreboot_tables.h> #define GPIO_COUNT 6 |