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| author | Bora Guvendik <bora.guvendik@intel.com> | 2021-10-18 14:17:41 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-20 15:48:38 +0000 |
| commit | fbf874fb381af8a0ef2c058538919d133e630d4d (patch) | |
| tree | 0564144399583ff88b5a3e67d92693d97562bc92 /src | |
| parent | 24e3d67004cd59f1c6e5bbff9661ddfdab88727a (diff) | |
| download | coreboot-fbf874fb381af8a0ef2c058538919d133e630d4d.tar.gz coreboot-fbf874fb381af8a0ef2c058538919d133e630d4d.tar.bz2 coreboot-fbf874fb381af8a0ef2c058538919d133e630d4d.zip | |
soc/intel/alderlake: Fix wrong FIVR configs assignment
For PchFivrExtVnnRailSxEnabledStates, vnn_enable_bitmap config is used
by mistake, instead of the expected vnn_sx_enable_bitmap
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Idf100be3ac4d6d97335c627e790c1870558d1210
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58430
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/alderlake/fsp_params.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 6e90cf17f8de..9ed8acd7438b 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -712,7 +712,7 @@ static void fill_fsps_fivr_params(FSP_S_CONFIG *s_cfg, config->ext_fivr_settings.vnn_supported_voltage_bitmap; s_cfg->PchFivrExtVnnRailSxEnabledStates = - config->ext_fivr_settings.vnn_enable_bitmap; + config->ext_fivr_settings.vnn_sx_enable_bitmap; /* Convert the voltages to increments of 2.5mv */ s_cfg->PchFivrExtV1p05RailVoltage = |