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| author | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2022-04-14 15:22:52 +0800 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-04-20 06:57:21 +0000 |
| commit | 3067701108216cf5eb41198922a6050d6c662f11 (patch) | |
| tree | 5286e5180bc7e4443c7ef10783d8c5c0b56ee345 /tests | |
| parent | d083317fae30b01fd855cf24d81203aa2d6dec3c (diff) | |
| download | coreboot-3067701108216cf5eb41198922a6050d6c662f11.tar.gz coreboot-3067701108216cf5eb41198922a6050d6c662f11.tar.bz2 coreboot-3067701108216cf5eb41198922a6050d6c662f11.zip | |
lib: Check for non-existent DIMMs in check_if_dimm_changed
Treat dimm addr_map 0 non-existent. addr_map default is 0, we don't set
it if Hw is not present. Also change the test case default to avoid 0.
SODIMM SMbus address 0x50 to 0x53 is commonly used.
BUG=b:213964936
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot chromeos-bootimage
The MRC training does not be performed again after rebooting.
Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I2ada0109eb0805174cb85d4ce373e2a3ab7dbcac
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/lib/spd_cache-test.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/tests/lib/spd_cache-test.c b/tests/lib/spd_cache-test.c index e1c1777bc694..48f06e38835b 100644 --- a/tests/lib/spd_cache-test.c +++ b/tests/lib/spd_cache-test.c @@ -146,7 +146,8 @@ __attribute__((unused)) static void test_check_if_dimm_changed_not_changed(void { uint8_t *spd_cache; size_t spd_cache_sz; - struct spd_block blk = {.addr_map = {0}, .spd_array = {0}, .len = 0}; + struct spd_block blk = {.addr_map = {0x50, 0x51, 0x52, 0x53}, + .spd_array = {0}, .len = 0}; assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz)); fill_spd_cache_ddr4(spd_cache, spd_cache_sz); @@ -162,7 +163,8 @@ __attribute__((unused)) static void test_check_if_dimm_changed_sn_error(void **s { uint8_t *spd_cache; size_t spd_cache_sz; - struct spd_block blk = {.addr_map = {0}, .spd_array = {0}, .len = 0}; + struct spd_block blk = {.addr_map = {0x50, 0x51, 0x52, 0x53}, + .spd_array = {0}, .len = 0}; assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz)); fill_spd_cache_ddr4(spd_cache, spd_cache_sz); @@ -177,7 +179,8 @@ __attribute__((unused)) static void test_check_if_dimm_changed_sodimm_lost(void { uint8_t *spd_cache; size_t spd_cache_sz; - struct spd_block blk = {.addr_map = {0}, .spd_array = {0}, .len = 0}; + struct spd_block blk = {.addr_map = {0x50, 0x51, 0x52, 0x53}, + .spd_array = {0}, .len = 0}; assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz)); fill_spd_cache_ddr4(spd_cache, spd_cache_sz); @@ -194,7 +197,8 @@ __attribute__((unused)) static void test_check_if_dimm_changed_new_sodimm(void * { uint8_t *spd_cache; size_t spd_cache_sz; - struct spd_block blk = {.addr_map = {0}, .spd_array = {0}, .len = 0}; + struct spd_block blk = {.addr_map = {0x50, 0x51, 0x52, 0x53}, + .spd_array = {0}, .len = 0}; assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz)); fill_spd_cache_ddr4(spd_cache, spd_cache_sz); @@ -212,7 +216,8 @@ __attribute__((unused)) static void test_check_if_dimm_changed_sn_changed(void * { uint8_t *spd_cache; size_t spd_cache_sz; - struct spd_block blk = {.addr_map = {0}, .spd_array = {0}, .len = 0}; + struct spd_block blk = {.addr_map = {0x50, 0x51, 0x52, 0x53}, + .spd_array = {0}, .len = 0}; assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz)); fill_spd_cache_ddr4(spd_cache, spd_cache_sz); |