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| author | Subrata Banik <subratabanik@google.com> | 2022-04-13 20:30:53 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-04-19 05:46:38 +0000 |
| commit | d643165c64ef89c72e4e004abe7a7675f90b0955 (patch) | |
| tree | 029f17903ade24225f82628e8bd44b772ea663da /tests | |
| parent | d5e7c63a85136d1679c709da98bc80bd819663ed (diff) | |
| download | coreboot-d643165c64ef89c72e4e004abe7a7675f90b0955.tar.gz coreboot-d643165c64ef89c72e4e004abe7a7675f90b0955.tar.bz2 coreboot-d643165c64ef89c72e4e004abe7a7675f90b0955.zip | |
soc/intel/cmn/fast_spi: Add API to set SPI controller VCL
This patch creates a helper function to set SPI controller VCL bit as
recommended by Intel Flash Security Specification.
BUG=b:211954778
TEST=Able to build google/brya and verified that SPI flash controller
MMIO register 0xC4 bit 30 is set.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ie9a12db1bab81779fd8e7db90221d08da3c65011
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63626
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'tests')
0 files changed, 0 insertions, 0 deletions