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authorAngel Pons <th3fanbus@gmail.com>2021-06-04 13:00:36 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-06-07 11:37:17 +0000
commit427e435b9ba28ebc9f5ee5535ba06c73e07f40c8 (patch)
tree4b2031d367d8c0c71dce500bfa9bb427a1419d0b /util/autoport
parent685dc56b9f2cf639c8aa72eed948e02044683642 (diff)
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sb/intel/bd82x6x: Drop P_LVLx support in FADT
IO MWAIT redirection is not enabled, and C-states are reported using the _CST ACPI object, which overrides the P_LVLx values. Change-Id: I737bd58bcda3e7c5f6591e4c2309530ff035e2c8 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55218 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'util/autoport')
-rw-r--r--util/autoport/bd82x6x.go1
1 files changed, 0 insertions, 1 deletions
diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go
index e2a84e4c510e..ad8918a041c0 100644
--- a/util/autoport/bd82x6x.go
+++ b/util/autoport/bd82x6x.go
@@ -230,7 +230,6 @@ func (b bd82x6x) Scan(ctx Context, addr PCIDevData) {
"sata_port_map": fmt.Sprintf("0x%x", PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 2}].ConfigDump[0x92]&0x3f),
- "c2_latency": FormatHexLE16(FADT[96:98]),
"docking_supported": (FormatBool((FADT[113] & (1 << 1)) != 0)),
"spi_uvscc": fmt.Sprintf("0x%x", inteltool.RCBA[0x38c8]),
"spi_lvscc": fmt.Sprintf("0x%x", inteltool.RCBA[0x38c4]&^(1<<23)),