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| author | Ionela Voinescu <ionela.voinescu@imgtec.com> | 2015-07-15 12:10:05 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-12-27 20:55:21 +0100 |
| commit | 90d12351fd5c3626edd283aafe20b2a427f9d344 (patch) | |
| tree | 2639f236946684c6b6a2b1d4b680bae40be72bf5 /util/genbuild_h | |
| parent | 8d2b49f1f71a88aad29f3a5d919156e6b7f3b103 (diff) | |
| download | coreboot-90d12351fd5c3626edd283aafe20b2a427f9d344.tar.gz coreboot-90d12351fd5c3626edd283aafe20b2a427f9d344.tar.bz2 coreboot-90d12351fd5c3626edd283aafe20b2a427f9d344.zip | |
mainboard/google/urara: change SYS PLL to 700MHz
This requires changes the interface that sets up the system
PLL to support a given reference devider value and given
feedback value.
Also, this requires a change in the dividers used for UART,
USB, I2C setup.
Change-Id: I98cf7c655dbb3e95b8fcee3c7f468122021c70b5
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Reviewed-on: https://review.coreboot.org/12765
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'util/genbuild_h')
0 files changed, 0 insertions, 0 deletions