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| author | Damien Zammit <damien@zamaudio.com> | 2014-05-26 23:00:23 +1000 |
|---|---|---|
| committer | Idwer Vollering <vidwer@gmail.com> | 2014-06-11 03:05:01 +0200 |
| commit | 601da481b5437c7a73f97a1bece5990a393037d8 (patch) | |
| tree | bbc60c032786ac6a1b9d8edb4c9b5716ceb6aaea /util/inteltool/pcie.c | |
| parent | 0240f9492b79509c5b679190853405dc218244f0 (diff) | |
| download | coreboot-601da481b5437c7a73f97a1bece5990a393037d8.tar.gz coreboot-601da481b5437c7a73f97a1bece5990a393037d8.tar.bz2 coreboot-601da481b5437c7a73f97a1bece5990a393037d8.zip | |
util/inteltool: Add pci ids for 4 northbridge models instead of 1.
This patch supports northbridges: 0x0150 0x0154 0x0158 0x015c as 3rd gen core.
Tested on 0x0150 (0x0154 previously only model).
Change-Id: I53a33d864494dd4ac1cb9e8330450f56001ed92c
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: http://review.coreboot.org/5873
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'util/inteltool/pcie.c')
| -rw-r--r-- | util/inteltool/pcie.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/util/inteltool/pcie.c b/util/inteltool/pcie.c index cafd34ab373a..346d51aeecfe 100644 --- a/util/inteltool/pcie.c +++ b/util/inteltool/pcie.c @@ -239,7 +239,10 @@ int print_dmibar(struct pci_dev *nb) case PCI_DEVICE_ID_INTEL_CORE_2ND_GEN: dmi_registers = sandybridge_dmi_registers; size = ARRAY_SIZE(sandybridge_dmi_registers); - case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN: /* pretty printing not implemented yet */ + case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_A: /* pretty printing not implemented yet */ + case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_B: + case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_C: + case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_D: dmibar_phys = pci_read_long(nb, 0x68); dmibar_phys |= ((uint64_t)pci_read_long(nb, 0x6c)) << 32; dmibar_phys &= 0x0000007ffffff000UL; /* 38:12 */ |