diff options
| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2021-07-09 16:00:16 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2022-02-15 19:44:08 +0000 |
| commit | 8ac40f3ea71fe9087ead28fa3a571f6248e4d74c (patch) | |
| tree | ddfa74dc02974f3ff552b3b5b790d7b7358c1ac4 /util/inteltool/pcr.c | |
| parent | 0de0254a1fef88a8758e0bdc81a25101cd3c9ccd (diff) | |
| download | coreboot-8ac40f3ea71fe9087ead28fa3a571f6248e4d74c.tar.gz coreboot-8ac40f3ea71fe9087ead28fa3a571f6248e4d74c.tar.bz2 coreboot-8ac40f3ea71fe9087ead28fa3a571f6248e4d74c.zip | |
util/inteltool: Add support for Tiger Lake chips detection and GPIOs
Add PCI IDs for Tiger Lake LP and Tiger Lake H devices and their GPIO
tables.
TEST: dump GPIOs on i5-1135G7, Tiger Lake H untested
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I6071a999be9e8a372997db0369218f297e579d08
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'util/inteltool/pcr.c')
| -rw-r--r-- | util/inteltool/pcr.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/util/inteltool/pcr.c b/util/inteltool/pcr.c index 921fdf044564..590ae2c18782 100644 --- a/util/inteltool/pcr.c +++ b/util/inteltool/pcr.c @@ -129,10 +129,26 @@ void pcr_init(struct pci_dev *const sb) case PCI_DEVICE_ID_INTEL_QM370: case PCI_DEVICE_ID_INTEL_HM370: case PCI_DEVICE_ID_INTEL_CM246: + case PCI_DEVICE_ID_INTEL_Q570: + case PCI_DEVICE_ID_INTEL_Z590: + case PCI_DEVICE_ID_INTEL_H570: + case PCI_DEVICE_ID_INTEL_B560: + case PCI_DEVICE_ID_INTEL_H510: + case PCI_DEVICE_ID_INTEL_WM590: + case PCI_DEVICE_ID_INTEL_QM580: + case PCI_DEVICE_ID_INTEL_HM570: + case PCI_DEVICE_ID_INTEL_C252: + case PCI_DEVICE_ID_INTEL_C256: + case PCI_DEVICE_ID_INTEL_W580: case PCI_DEVICE_ID_INTEL_CANNONPOINT_LP_U_PREM: case PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_PREM: case PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_BASE: case PCI_DEVICE_ID_INTEL_ICELAKE_LP_U: + case PCI_DEVICE_ID_INTEL_TIGERPOINT_U_SUPER: + case PCI_DEVICE_ID_INTEL_TIGERPOINT_U_PREM: + case PCI_DEVICE_ID_INTEL_TIGERPOINT_U_BASE: + case PCI_DEVICE_ID_INTEL_TIGERPOINT_Y_SUPER: + case PCI_DEVICE_ID_INTEL_TIGERPOINT_Y_PREM: sbbar_phys = 0xfd000000; use_p2sb = false; break; |