diff options
| author | Tobias Diedrich <ranma+coreboot@tdiedrich.de> | 2010-11-27 14:44:19 +0000 |
|---|---|---|
| committer | Tobias Diedrich <ranma@tdiedrich.de> | 2010-11-27 14:44:19 +0000 |
| commit | 3645e61608a802f66b3109a090a591d9f2bb1dcd (patch) | |
| tree | 766fc71030de0fb5c53cc35a6c96f99c3b4f53f0 /util/inteltool/powermgt.c | |
| parent | e87c38e0af8b5eca8b7482e52a2a6f15388cedfe (diff) | |
| download | coreboot-3645e61608a802f66b3109a090a591d9f2bb1dcd.tar.gz coreboot-3645e61608a802f66b3109a090a591d9f2bb1dcd.tar.bz2 coreboot-3645e61608a802f66b3109a090a591d9f2bb1dcd.zip | |
- Add support for Intel Pentium III MSRs
- pmbase is on southbridge function 3 on I82371XX
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/inteltool/powermgt.c')
| -rw-r--r-- | util/inteltool/powermgt.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c index 3032f4dbe75f..1a7317a319ad 100644 --- a/util/inteltool/powermgt.c +++ b/util/inteltool/powermgt.c @@ -524,11 +524,12 @@ static const io_register_t i82371xx_pm_registers[] = { { 0x37, 1, "GPOREG 3" }, }; -int print_pmbase(struct pci_dev *sb) +int print_pmbase(struct pci_dev *sb, struct pci_access *pacc) { int i, size; uint16_t pmbase; const io_register_t *pm_registers; + struct pci_dev *acpi; printf("\n============= PMBASE ============\n\n"); @@ -584,7 +585,12 @@ int print_pmbase(struct pci_dev *sb) size = ARRAY_SIZE(ich0_pm_registers); break; case PCI_DEVICE_ID_INTEL_82371XX: - pmbase = pci_read_word(sb, 0x40) & 0xfffc; + acpi = pci_get_dev(pacc, sb->domain, sb->bus, sb->dev, 3); + if (!acpi) { + printf("Southbridge function 3 not found.\n"); + return 1; + } + pmbase = pci_read_word(acpi, 0x40) & 0xfffc; pm_registers = i82371xx_pm_registers; size = ARRAY_SIZE(i82371xx_pm_registers); break; |