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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-03-13 21:17:21 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-03-20 21:05:29 +0000 |
| commit | 8ca1ada083e9029defb2d40f33702bd2553d113f (patch) | |
| tree | 9d736aa974299ef2dd06309036628eeda294b8b8 /util/inteltool/powermgt.c | |
| parent | 064c7999ae5bab4a29d4ee299f6a8c6a97a5da66 (diff) | |
| download | coreboot-8ca1ada083e9029defb2d40f33702bd2553d113f.tar.gz coreboot-8ca1ada083e9029defb2d40f33702bd2553d113f.tar.bz2 coreboot-8ca1ada083e9029defb2d40f33702bd2553d113f.zip | |
util/inteltool: powermgt: add code for dumping config registers
This adds the code required to dump config registers.
Change-Id: Ic78f847ba07240c112492229f9a23f9a88275ad9
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39509
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'util/inteltool/powermgt.c')
| -rw-r--r-- | util/inteltool/powermgt.c | 43 |
1 files changed, 39 insertions, 4 deletions
diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c index 70f8c48f0d6a..125c7396ecef 100644 --- a/util/inteltool/powermgt.c +++ b/util/inteltool/powermgt.c @@ -670,12 +670,14 @@ static const io_register_t i63xx_pm_registers[] = { int print_pmbase(struct pci_dev *sb, struct pci_access *pacc) { size_t i, pm_registers_size = 0; + size_t pm_cfg_registers_size = 0; uint16_t pmbase; const io_register_t *pm_registers; + const io_register_t *pm_cfg_registers; uint64_t pwrmbase_phys = 0; - struct pci_dev *acpi; + struct pci_dev *acpi = NULL; - printf("\n========== PMBASE/ABASE =========\n\n"); + printf("\n========== ACPI/PMC =========\n\n"); switch (sb->device_id) { case PCI_DEVICE_ID_INTEL_3400: @@ -813,7 +815,6 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc) return 1; } pmbase = pci_read_word(acpi, 0x40) & 0xfffc; - pci_free_dev(acpi); pm_registers = i82371xx_pm_registers; pm_registers_size = ARRAY_SIZE(i82371xx_pm_registers); @@ -855,7 +856,6 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc) } pmbase = pci_read_word(acpi, 0x40) & ~0xff; pwrmbase_phys = pci_read_long(acpi, 0x48) & ~0xfff; - pci_free_dev(acpi); pm_registers = sunrise_pm_registers; pm_registers_size = ARRAY_SIZE(sunrise_pm_registers); @@ -865,6 +865,41 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc) return 1; } + for (i = 0; i < pm_cfg_registers_size; i++) { + switch (pm_cfg_registers[i].size) { + case 8: + printf("0x%04x: 0x%08x (%s)\n" + " 0x%08x\n", + pm_cfg_registers[i].addr, + pci_read_long(acpi, pm_cfg_registers[i].addr), + pm_cfg_registers[i].name, + pci_read_long(acpi, pm_cfg_registers[i].addr+4)); + break; + case 4: + printf("0x%04x: 0x%08x (%s)\n", + pm_cfg_registers[i].addr, + pci_read_long(acpi, pm_cfg_registers[i].addr), + pm_cfg_registers[i].name); + break; + case 2: + printf("0x%04x: 0x%04x (%s)\n", + pm_cfg_registers[i].addr, + pci_read_word(acpi, pm_cfg_registers[i].addr), + pm_cfg_registers[i].name); + break; + case 1: + printf("0x%04x: 0x%02x (%s)\n", + pm_cfg_registers[i].addr, + pci_read_byte(acpi, pm_cfg_registers[i].addr), + pm_cfg_registers[i].name); + break; + } + } + + if (acpi) + pci_free_dev(acpi); + + printf("\n========== ABASE/PMBASE =========\n\n"); printf("PMBASE = 0x%04x (IO)\n\n", pmbase); for (i = 0; i < pm_registers_size; i++) { |