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authorArthur Heymans <arthur@aheymans.xyz>2017-04-10 22:26:13 +0200
committerNico Huber <nico.h@gmx.de>2017-04-15 20:06:08 +0200
commit026f7df763c5658a31e335d6de68263bd9bc2893 (patch)
treea4fa08491d49b59a15a912572bd96222fddb1b36 /util
parent241c4f244fc3365eddd80516a9dd2fd93fae9299 (diff)
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util/inteltool: Add ICH10 (Consumer Base) support
Reuses ICH10R functions. TESTED on Intel DG43GT (Not supported by coreboot) Change-Id: If9ae8ba8b95e3a7bf6596ae639eb8cafab583298 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19232 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'util')
-rw-r--r--util/inteltool/gpio.c1
-rw-r--r--util/inteltool/inteltool.c1
-rw-r--r--util/inteltool/inteltool.h1
-rw-r--r--util/inteltool/powermgt.c1
-rw-r--r--util/inteltool/rootcmplx.c1
-rw-r--r--util/inteltool/spi.c2
6 files changed, 7 insertions, 0 deletions
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c
index b9d5ae1d2d2d..db0e3a40bea5 100644
--- a/util/inteltool/gpio.c
+++ b/util/inteltool/gpio.c
@@ -939,6 +939,7 @@ int print_gpios(struct pci_dev *sb, int show_all, int show_diffs)
gpio_defaults = pp_pch_mobile_defaults;
defaults_size = ARRAY_SIZE(pp_pch_mobile_defaults);
break;
+ case PCI_DEVICE_ID_INTEL_ICH10:
case PCI_DEVICE_ID_INTEL_ICH10R:
gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
gpio_registers = ich10_gpio_registers;
diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c
index 659690078240..79b0bcead181 100644
--- a/util/inteltool/inteltool.c
+++ b/util/inteltool/inteltool.c
@@ -93,6 +93,7 @@ static const struct {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL, "Bay Trail" },
/* Southbridges (LPC controllers) */
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "371AB/EB/MB" },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10, "ICH10" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10R, "ICH10R" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DH, "ICH9DH" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DO, "ICH9DO" },
diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h
index 5931cb02c931..cd981d1870d2 100644
--- a/util/inteltool/inteltool.h
+++ b/util/inteltool/inteltool.h
@@ -82,6 +82,7 @@ static inline uint32_t inl(unsigned port)
#define PCI_DEVICE_ID_INTEL_ICH9M 0x2919
#define PCI_DEVICE_ID_INTEL_ICH9ME 0x2917
#define PCI_DEVICE_ID_INTEL_ICH10R 0x3a16
+#define PCI_DEVICE_ID_INTEL_ICH10 0x3a18
#define PCI_DEVICE_ID_INTEL_3400_DESKTOP 0x3b00
#define PCI_DEVICE_ID_INTEL_3400_MOBILE 0x3b01
#define PCI_DEVICE_ID_INTEL_P55 0x3b02
diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c
index fd0d00f0d896..7f0430884e1c 100644
--- a/util/inteltool/powermgt.c
+++ b/util/inteltool/powermgt.c
@@ -707,6 +707,7 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
pm_registers = pch_pm_registers;
size = ARRAY_SIZE(pch_pm_registers);
break;
+ case PCI_DEVICE_ID_INTEL_ICH10:
case PCI_DEVICE_ID_INTEL_ICH10R:
pmbase = pci_read_word(sb, 0x40) & 0xff80;
pm_registers = ich10_pm_registers;
diff --git a/util/inteltool/rootcmplx.c b/util/inteltool/rootcmplx.c
index 323811d19280..337f981c2f1b 100644
--- a/util/inteltool/rootcmplx.c
+++ b/util/inteltool/rootcmplx.c
@@ -41,6 +41,7 @@ int print_rcba(struct pci_dev *sb)
case PCI_DEVICE_ID_INTEL_ICH9:
case PCI_DEVICE_ID_INTEL_ICH9M:
case PCI_DEVICE_ID_INTEL_ICH9ME:
+ case PCI_DEVICE_ID_INTEL_ICH10:
case PCI_DEVICE_ID_INTEL_ICH10R:
case PCI_DEVICE_ID_INTEL_NM10:
case PCI_DEVICE_ID_INTEL_I63XX:
diff --git a/util/inteltool/spi.c b/util/inteltool/spi.c
index 8dc6ecb7ee35..154b3c958126 100644
--- a/util/inteltool/spi.c
+++ b/util/inteltool/spi.c
@@ -106,6 +106,7 @@ int print_bioscntl(struct pci_dev *sb)
case PCI_DEVICE_ID_INTEL_ICH9:
case PCI_DEVICE_ID_INTEL_ICH9M:
case PCI_DEVICE_ID_INTEL_ICH9ME:
+ case PCI_DEVICE_ID_INTEL_ICH10:
case PCI_DEVICE_ID_INTEL_ICH10R:
case PCI_DEVICE_ID_INTEL_NM10:
bios_cntl = pci_read_byte(sb, 0xdc);
@@ -187,6 +188,7 @@ int print_spibar(struct pci_dev *sb) {
case PCI_DEVICE_ID_INTEL_ICH9:
case PCI_DEVICE_ID_INTEL_ICH9M:
case PCI_DEVICE_ID_INTEL_ICH9ME:
+ case PCI_DEVICE_ID_INTEL_ICH10:
case PCI_DEVICE_ID_INTEL_ICH10R:
case PCI_DEVICE_ID_INTEL_NM10:
case PCI_DEVICE_ID_INTEL_I63XX: