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| author | Subrata Banik <subrata.banik@intel.com> | 2020-09-29 11:43:01 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-10-02 04:01:08 +0000 |
| commit | a5f4781d81a1d8aadaa527bc287ba2b8b17024b5 (patch) | |
| tree | f3a8d03d30a34a0ebaee56a9a75a6662f23c1929 /util | |
| parent | 2b3416134fa2f1400b764666dd7f1953915029a8 (diff) | |
| download | coreboot-a5f4781d81a1d8aadaa527bc287ba2b8b17024b5.tar.gz coreboot-a5f4781d81a1d8aadaa527bc287ba2b8b17024b5.tar.bz2 coreboot-a5f4781d81a1d8aadaa527bc287ba2b8b17024b5.zip | |
util/ifdtool: Include ADL dynamic check as per Gen12 SPI flash guide
BUG=b:153888802
TEST=Able to list correct PCH revision, SPI/eSPI frequency as per
ADL SPI flash guide.
Without this CL :
PCH Revision: 500 series Tiger Point
With this CL :
PCH Revision: 500 series Tiger Point/ 600 series Alder Point
Change-Id: I0faf0f0fdb625ff82eb0033b5b77e6470971bc23
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45808
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'util')
| -rw-r--r-- | util/ifdtool/ifdtool.c | 14 | ||||
| -rw-r--r-- | util/ifdtool/ifdtool.h | 3 |
2 files changed, 9 insertions, 8 deletions
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index fab034ade48d..220c14041700 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -72,7 +72,7 @@ static const char *const ich_chipset_names[] = { "Gemini Lake: N5xxx, J5xxx, N4xxx, J4xxx", "100/200 series Sunrise Point", "300 series Cannon Point/ 400 series Ice Point", - "500 series Tiger Point", + "500 series Tiger Point/ 600 series Alder Point", "C620 series Lewisburg", NULL }; @@ -181,7 +181,7 @@ static enum ich_chipset guess_ifd_2_chipset(const fpsba_t *fpsba) /* Offset 0x58 bit [2:0] is reserved 0x4 and 0x5a bit [7:0] is reserved 0x58 */ if (((pchstrp_22 & 0x07) == 0x4) && ((pchstrp_22 & 0xFF0000) >> 16 == 0x58)) - return CHIPSET_500_SERIES_TIGER_POINT; + return CHIPSET_500_600_SERIES_TIGER_ALDER_POINT; return CHIPSET_PCH_UNKNOWN; } @@ -503,7 +503,7 @@ static void _decode_spi_frequency_500_series(unsigned int freq) static void decode_spi_frequency(unsigned int freq) { - if (chipset == CHIPSET_500_SERIES_TIGER_POINT) + if (chipset == CHIPSET_500_600_SERIES_TIGER_ALDER_POINT) _decode_spi_frequency_500_series(freq); else _decode_spi_frequency(freq); @@ -560,7 +560,7 @@ static void _decode_espi_frequency_500_series(unsigned int freq) static void decode_espi_frequency(unsigned int freq) { - if (chipset == CHIPSET_500_SERIES_TIGER_POINT) + if (chipset == CHIPSET_500_600_SERIES_TIGER_ALDER_POINT) _decode_espi_frequency_500_series(freq); else _decode_espi_frequency(freq); @@ -613,7 +613,7 @@ static int is_platform_with_pch(void) static int is_platform_with_100x_series_pch(void) { if (chipset >= CHIPSET_100_200_SERIES_SUNRISE_POINT && - chipset <= CHIPSET_500_SERIES_TIGER_POINT) + chipset <= CHIPSET_500_600_SERIES_TIGER_ALDER_POINT) return 1; return 0; @@ -638,7 +638,7 @@ static void dump_fcba(const fcba_t *fcba, const fpsba_t *fpsba) if (is_platform_with_100x_series_pch() && chipset != CHIPSET_100_200_SERIES_SUNRISE_POINT) { printf("\n Read eSPI/EC Bus Frequency: "); - if (chipset == CHIPSET_500_SERIES_TIGER_POINT) + if (chipset == CHIPSET_500_600_SERIES_TIGER_ALDER_POINT) freq = (fpsba->pchstrp[22] & 0x38) >> 3; else freq = (fcba->flcomp >> 17) & 7; @@ -911,7 +911,7 @@ static void dump_fd(char *image, int size) printf(" FMSBA: 0x%x\n", ((fdb->flmap2) & 0xff) << 4); } - if (chipset == CHIPSET_500_SERIES_TIGER_POINT) { + if (chipset == CHIPSET_500_600_SERIES_TIGER_ALDER_POINT) { printf("FLMAP3: 0x%08x\n", fdb->flmap3); printf(" Minor Revision ID: 0x%04x\n", (fdb->flmap3 >> 14) & 0x7f); printf(" Major Revision ID: 0x%04x\n", (fdb->flmap3 >> 21) & 0x7ff); diff --git a/util/ifdtool/ifdtool.h b/util/ifdtool/ifdtool.h index b72582358c85..ced4f2b062d6 100644 --- a/util/ifdtool/ifdtool.h +++ b/util/ifdtool/ifdtool.h @@ -38,7 +38,8 @@ enum ich_chipset { CHIPSET_N_J_SERIES, /* Gemini Lake: N5xxx, J5xxx, N4xxx, J4xxx */ CHIPSET_100_200_SERIES_SUNRISE_POINT, /* 6th-7th gen Core i/o (LP) variants */ CHIPSET_300_400_SERIES_CANNON_ICE_POINT, /* 8th-10th gen Core i/o (LP) variants */ - CHIPSET_500_SERIES_TIGER_POINT, /* 11th gen Core i/o (LP) variants onwards */ + CHIPSET_500_600_SERIES_TIGER_ALDER_POINT, /* 11th-12th gen Core i/o (LP) + * variants onwards */ CHIPSET_C620_SERIES_LEWISBURG, }; |