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-rw-r--r--Documentation/mainboard/asus/p8z77-v_le_plus.md2
-rw-r--r--src/mainboard/asus/p8x7x-series/Kconfig1
-rw-r--r--src/soc/intel/pantherlake/romstage/fsp_params.c4
3 files changed, 3 insertions, 4 deletions
diff --git a/Documentation/mainboard/asus/p8z77-v_le_plus.md b/Documentation/mainboard/asus/p8z77-v_le_plus.md
index 2664127a4e70..dc80eeb8c3b4 100644
--- a/Documentation/mainboard/asus/p8z77-v_le_plus.md
+++ b/Documentation/mainboard/asus/p8z77-v_le_plus.md
@@ -100,8 +100,6 @@ See "PCIe config" section below for more details.
## Known issues
-- RTL8111F here has no EEPROM for vital product data such as MAC address, which is also not
- being properly programmed. You may need to fuse your MAC address with [rtnicpg] instead.
- For 7.1 analog audio to work, at least the front channel (green jack) must be connected.
## Untested
diff --git a/src/mainboard/asus/p8x7x-series/Kconfig b/src/mainboard/asus/p8x7x-series/Kconfig
index e3e977f00e25..112d861f9430 100644
--- a/src/mainboard/asus/p8x7x-series/Kconfig
+++ b/src/mainboard/asus/p8x7x-series/Kconfig
@@ -62,6 +62,7 @@ config BOARD_ASUS_P8Z77_V_LE_PLUS
select BOARD_ASUS_P8X7X_SERIES
select BOARD_ROMSIZE_KB_8192
select RT8168_SET_LED_MODE
+ select RT8168_PUT_MAC_TO_ERI
select SUPERIO_NUVOTON_NCT6779D
select USE_NATIVE_RAMINIT
select POWER_LED_USES_GPIO8
diff --git a/src/soc/intel/pantherlake/romstage/fsp_params.c b/src/soc/intel/pantherlake/romstage/fsp_params.c
index b83eb18c7af3..3f13be273510 100644
--- a/src/soc/intel/pantherlake/romstage/fsp_params.c
+++ b/src/soc/intel/pantherlake/romstage/fsp_params.c
@@ -36,8 +36,8 @@ static void fill_fspm_igd_params(FSP_M_CONFIG *m_cfg,
};
m_cfg->InternalGraphics = !CONFIG(SOC_INTEL_DISABLE_IGD) && is_devfn_enabled(PCI_DEVFN_IGD);
if (m_cfg->InternalGraphics) {
- /* IGD is enabled, set IGD stolen size to 128MB. */
- m_cfg->IgdDvmt50PreAlloc = IGD_SM_128MB;
+ /* IGD is enabled, set IGD stolen size to 64MB. */
+ m_cfg->IgdDvmt50PreAlloc = IGD_SM_64MB;
/* DP port config */
m_cfg->DdiPortAConfig = config->ddi_port_A_config;
m_cfg->DdiPortBConfig = config->ddi_port_B_config;