diff options
5 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 1349f69dab97..2124dc4cb17b 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -183,7 +183,7 @@ chip soc/intel/jasperlake # For an offset = 12.580, use 12580 register "ImonOffset" = "0" - # Skip the CPU repalcement check + # Skip the CPU replacement check register "SkipCpuReplacementCheck" = "1" # Sagv Configuration diff --git a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb index baf0ba12eede..8b075ff7bc12 100644 --- a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb +++ b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb @@ -40,7 +40,7 @@ chip soc/intel/elkhartlake register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC3)" # USB3 WLAN register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # UNUSED - # Skip the CPU repalcement check + # Skip the CPU replacement check register "SkipCpuReplacementCheck" = "1" # PCIe root ports related UPDs diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb index 21206946203b..fdd1a78a785d 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb @@ -53,7 +53,7 @@ chip soc/intel/jasperlake # EC memory map range is 0x900-0x9ff register "gen3_dec" = "0x00fc0901" - # Skip the CPU repalcement check + # Skip the CPU replacement check register "SkipCpuReplacementCheck" = "1" register "PchHdaDspEnable" = "1" diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb index 9bb8d8f32821..69277a5b1083 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb @@ -38,7 +38,7 @@ chip soc/intel/elkhartlake register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Port is not used register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Port is not used - # Skip the CPU repalcement check + # Skip the CPU replacement check register "SkipCpuReplacementCheck" = "1" # PCIe root ports related UPDs diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 72e4f60cd375..9883fd92e4b5 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -38,7 +38,7 @@ chip soc/intel/elkhartlake register "usb3_ports[2]" = "USB3_PORT_EMPTY" # UNUSED register "usb3_ports[3]" = "USB3_PORT_EMPTY" # UNUSED - # Skip the CPU repalcement check + # Skip the CPU replacement check register "SkipCpuReplacementCheck" = "1" # PCIe root ports related UPDs |