diff options
73 files changed, 5 insertions, 70 deletions
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c index 3b3738c99a34..81175dade368 100644 --- a/src/cpu/amd/car/post_cache_as_ram.c +++ b/src/cpu/amd/car/post_cache_as_ram.c @@ -77,7 +77,7 @@ static void vErrata343(void) void cache_as_ram_switch_stack(void *resume_backup_memory); -static void post_cache_as_ram(void) +void post_cache_as_ram(void) { void *resume_backup_memory = NULL; #if 1 diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c index ed009d72a41e..a2f78d344595 100644 --- a/src/cpu/amd/model_10xxx/init_cpus.c +++ b/src/cpu/amd/model_10xxx/init_cpus.c @@ -17,6 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include "cpu/amd/car/post_cache_as_ram.c" #include "defaults.h" #include <stdlib.h> #include <cpu/x86/lapic.h> diff --git a/src/cpu/amd/model_fxx/init_cpus.c b/src/cpu/amd/model_fxx/init_cpus.c index 71216426056a..834821b3418d 100644 --- a/src/cpu/amd/model_fxx/init_cpus.c +++ b/src/cpu/amd/model_fxx/init_cpus.c @@ -1,3 +1,5 @@ +#include "cpu/amd/car/post_cache_as_ram.c" + #if CONFIG_HAVE_OPTION_TABLE #include "option_table.h" #endif diff --git a/src/include/lib.h b/src/include/lib.h index db8f42ded823..5fc390a4a063 100644 --- a/src/include/lib.h +++ b/src/include/lib.h @@ -54,6 +54,7 @@ void cache_as_ram_main(void); #else void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); #endif +void post_cache_as_ram(void); /* Defined in src/lib/hexdump.c */ void hexdump(unsigned long memory, int length); diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c index 307d49a10f54..c1366d52d46f 100644 --- a/src/mainboard/advansus/a785e-i/romstage.c +++ b/src/mainboard/advansus/a785e-i/romstage.c @@ -63,7 +63,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index 64d9a569c782..9f930e83cf95 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -62,7 +62,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c index 3d59b2aa2978..74b6d1b1878b 100644 --- a/src/mainboard/amd/dbm690t/romstage.c +++ b/src/mainboard/amd/dbm690t/romstage.c @@ -58,7 +58,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c index 0e68bef5cc39..b77d4b5a1b8e 100644 --- a/src/mainboard/amd/mahogany/romstage.c +++ b/src/mainboard/amd/mahogany/romstage.c @@ -59,7 +59,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index 6c635bb027c5..06deb1880e29 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -62,7 +62,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c index 1519e29a6a38..2971072b11ad 100644 --- a/src/mainboard/amd/pistachio/romstage.c +++ b/src/mainboard/amd/pistachio/romstage.c @@ -53,7 +53,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index ffbad0f5ffc6..d8d5aa99f7bd 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -77,7 +77,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index 0a6f99d650d2..bb7d5d333bdf 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -83,7 +83,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index f1bc00161c1c..30e56d4bb4a8 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -61,7 +61,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/arima/hdama/romstage.c b/src/mainboard/arima/hdama/romstage.c index 191927d63e87..3c7eb585a549 100644 --- a/src/mainboard/arima/hdama/romstage.c +++ b/src/mainboard/arima/hdama/romstage.c @@ -59,7 +59,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c index 2438ca5d31e3..edc583073091 100644 --- a/src/mainboard/asrock/939a785gmh/romstage.c +++ b/src/mainboard/asrock/939a785gmh/romstage.c @@ -63,7 +63,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/asus/a8n_e/romstage.c b/src/mainboard/asus/a8n_e/romstage.c index d5b7cdc30add..29f425a225e0 100644 --- a/src/mainboard/asus/a8n_e/romstage.c +++ b/src/mainboard/asus/a8n_e/romstage.c @@ -59,7 +59,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "southbridge/nvidia/ck804/early_setup_ss.h" #include "southbridge/nvidia/ck804/early_setup.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c index c6f27c14c85f..453c4c5a7261 100644 --- a/src/mainboard/asus/a8v-e_deluxe/romstage.c +++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c @@ -83,7 +83,6 @@ void soft_reset(void) #include "northbridge/amd/amdk8/raminit.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/resourcemap.c" diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c index 866fa8d4abdd..a899bef02942 100644 --- a/src/mainboard/asus/a8v-e_se/romstage.c +++ b/src/mainboard/asus/a8v-e_se/romstage.c @@ -83,7 +83,6 @@ void soft_reset(void) #include "northbridge/amd/amdk8/raminit.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/resourcemap.c" diff --git a/src/mainboard/asus/k8v-x/romstage.c b/src/mainboard/asus/k8v-x/romstage.c index aea60b82678e..4fe10163e872 100644 --- a/src/mainboard/asus/k8v-x/romstage.c +++ b/src/mainboard/asus/k8v-x/romstage.c @@ -81,7 +81,6 @@ void soft_reset(void) #include "northbridge/amd/amdk8/raminit.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/resourcemap.c" diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c index 6146b73c4c72..8250743d869a 100644 --- a/src/mainboard/asus/m2n-e/romstage.c +++ b/src/mainboard/asus/m2n-e/romstage.c @@ -67,7 +67,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/dualcore/dualcore.c" #include "southbridge/nvidia/mcp55/early_setup_ss.h" #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index 6330f6ff3f03..7f93a1c69495 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -66,7 +66,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/raminit_f.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #define SB_VFSMAF 0 diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c index 904980374843..2e8b5df6b2dc 100644 --- a/src/mainboard/asus/m2v/romstage.c +++ b/src/mainboard/asus/m2v/romstage.c @@ -68,7 +68,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/raminit_f.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/resourcemap.c" diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c index ae813e576fff..18c6f181514b 100644 --- a/src/mainboard/asus/m4a78-em/romstage.c +++ b/src/mainboard/asus/m4a78-em/romstage.c @@ -61,7 +61,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index 8f4ace832f7e..660ab0f4cbe7 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -61,7 +61,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c index 3ea45f1c832a..af8e5fa6dca5 100644 --- a/src/mainboard/asus/m5a88-v/romstage.c +++ b/src/mainboard/asus/m5a88-v/romstage.c @@ -63,7 +63,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c index ab617e8d1701..8d4e4b2b5a31 100644 --- a/src/mainboard/avalue/eax-785e/romstage.c +++ b/src/mainboard/avalue/eax-785e/romstage.c @@ -63,7 +63,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c index b4c93c032ad0..fcdac692ec60 100644 --- a/src/mainboard/broadcom/blast/romstage.c +++ b/src/mainboard/broadcom/blast/romstage.c @@ -54,7 +54,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c index 7be37db5bf31..f770577ddf72 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c @@ -82,7 +82,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+60, 0x00, 0x60,/* GPIO61 FANCTL1 */ #include "southbridge/sis/sis966/early_setup_ss.h" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index 307335847957..88f3d2558ad1 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -74,7 +74,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c index d4af41c1f561..ecee35b53088 100644 --- a/src/mainboard/gigabyte/ma785gm/romstage.c +++ b/src/mainboard/gigabyte/ma785gm/romstage.c @@ -57,7 +57,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c index d4af41c1f561..ecee35b53088 100644 --- a/src/mainboard/gigabyte/ma785gmt/romstage.c +++ b/src/mainboard/gigabyte/ma785gmt/romstage.c @@ -57,7 +57,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c index 0840b1f62a25..bd9011e74d21 100644 --- a/src/mainboard/gigabyte/ma78gm/romstage.c +++ b/src/mainboard/gigabyte/ma78gm/romstage.c @@ -61,7 +61,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c index 01996e4f897b..87f93e886f4a 100644 --- a/src/mainboard/hp/dl145_g1/romstage.c +++ b/src/mainboard/hp/dl145_g1/romstage.c @@ -81,7 +81,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #define RC0 ((1<<1)<<8) diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c index 27d3af83b7d4..48a4f9d65881 100644 --- a/src/mainboard/hp/dl145_g3/romstage.c +++ b/src/mainboard/hp/dl145_g3/romstage.c @@ -78,7 +78,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include <spd.h> #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c index 88a3de6bb7a7..8e109c5bbf5e 100644 --- a/src/mainboard/hp/dl165_g6_fam10/romstage.c +++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c @@ -77,7 +77,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" #include "northbridge/amd/amdfam10/pci.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/ibm/e325/romstage.c b/src/mainboard/ibm/e325/romstage.c index e68c2dbf489b..b44668a5cad8 100644 --- a/src/mainboard/ibm/e325/romstage.c +++ b/src/mainboard/ibm/e325/romstage.c @@ -56,7 +56,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/ibm/e326/romstage.c b/src/mainboard/ibm/e326/romstage.c index 774845d7031f..c703b7aff407 100644 --- a/src/mainboard/ibm/e326/romstage.c +++ b/src/mainboard/ibm/e326/romstage.c @@ -56,7 +56,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c index d5279260252e..e5e2c577a34d 100644 --- a/src/mainboard/iei/kino-780am2-fam10/romstage.c +++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c @@ -63,7 +63,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c index 7b7c222ba4f5..5009829c1fa5 100644 --- a/src/mainboard/iwill/dk8_htx/romstage.c +++ b/src/mainboard/iwill/dk8_htx/romstage.c @@ -65,7 +65,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c index 4a0cf8b093f0..e1d8bf1103e6 100644 --- a/src/mainboard/iwill/dk8s2/romstage.c +++ b/src/mainboard/iwill/dk8s2/romstage.c @@ -65,7 +65,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c index 9d200238dcd8..f4147d21451c 100644 --- a/src/mainboard/iwill/dk8x/romstage.c +++ b/src/mainboard/iwill/dk8x/romstage.c @@ -65,7 +65,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index 2baea569aaff..b8fa48e0adcd 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -68,7 +68,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c index 816803872c04..52e54d4e07a8 100644 --- a/src/mainboard/kontron/kt690/romstage.c +++ b/src/mainboard/kontron/kt690/romstage.c @@ -60,7 +60,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c index e24cf0459d07..ebe2526f5c9b 100644 --- a/src/mainboard/msi/ms7135/romstage.c +++ b/src/mainboard/msi/ms7135/romstage.c @@ -63,7 +63,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "southbridge/nvidia/ck804/early_setup_ss.h" #include "southbridge/nvidia/ck804/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index 0177b7b7a2d5..c3bdc581c71a 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -76,7 +76,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) #include "southbridge/nvidia/mcp55/early_setup_ss.h" #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index 3392c3303d8e..2cb38a45e1bf 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -82,7 +82,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c index 83232fa6553e..7f8d0e79389b 100644 --- a/src/mainboard/msi/ms9282/romstage.c +++ b/src/mainboard/msi/ms9282/romstage.c @@ -89,7 +89,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+45, ~(0xff), ((0<<4)|(0<<2)|(0<<0)),/* P7,GPIO46, PCIXB_PRSNT2_L*/ \ #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" // Disabled until it's actually used: // #include "cpu/amd/model_fxx/fidvid.c" diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index f57b285f38fa..b21fb024845c 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -70,7 +70,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "southbridge/nvidia/mcp55/early_setup_ss.h" #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/newisys/khepri/romstage.c b/src/mainboard/newisys/khepri/romstage.c index 707d9a8e7a26..652104a2bdf1 100644 --- a/src/mainboard/newisys/khepri/romstage.c +++ b/src/mainboard/newisys/khepri/romstage.c @@ -62,7 +62,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c index 30abcce935c4..305ab661d952 100644 --- a/src/mainboard/nvidia/l1_2pvv/romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/romstage.c @@ -75,7 +75,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "southbridge/nvidia/mcp55/early_setup_ss.h" #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c index dc82585dbd06..cdab764a5585 100644 --- a/src/mainboard/siemens/sitemp_g1p1/romstage.c +++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c @@ -76,7 +76,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c index 13d3e63e38fc..7c112da98f26 100644 --- a/src/mainboard/sunw/ultra40/romstage.c +++ b/src/mainboard/sunw/ultra40/romstage.c @@ -63,7 +63,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+45, ~(0xff),((0<<4)|(0<<2)|(0<<0)),/* P7,GPIO46, PCIXB_PRSNT2_L*/ #include "southbridge/nvidia/ck804/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index 830913d4ef6e..150579478171 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -126,7 +126,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "southbridge/nvidia/mcp55/early_setup_ss.h" #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index ffef9ac05545..2709e1d201b9 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -67,7 +67,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "southbridge/nvidia/mcp55/early_setup_ss.h" #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index 067e2f51dad2..3f6ea706098c 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -63,7 +63,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/quadcore/quadcore.c" #include "southbridge/nvidia/mcp55/early_setup_ss.h" #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index d64375a5bba6..cca464c1f00f 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -69,7 +69,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/quadcore/quadcore.c" #include "southbridge/nvidia/mcp55/early_setup_ss.h" #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c index 97dda01408cc..e6ce5a82bdf3 100644 --- a/src/mainboard/supermicro/h8scm_fam10/romstage.c +++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c @@ -63,7 +63,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c index 0dcb7a18fae9..42c25996780c 100644 --- a/src/mainboard/technexion/tim5690/romstage.c +++ b/src/mainboard/technexion/tim5690/romstage.c @@ -58,7 +58,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "tn_post_code.c" diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c index b95ae46efdcc..22a12125c876 100644 --- a/src/mainboard/technexion/tim8690/romstage.c +++ b/src/mainboard/technexion/tim8690/romstage.c @@ -58,7 +58,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/tyan/s2850/romstage.c b/src/mainboard/tyan/s2850/romstage.c index e342e95063ab..301f81cafc07 100644 --- a/src/mainboard/tyan/s2850/romstage.c +++ b/src/mainboard/tyan/s2850/romstage.c @@ -52,7 +52,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/tyan/s2875/romstage.c b/src/mainboard/tyan/s2875/romstage.c index 53aa20333d55..7c9f93a224a8 100644 --- a/src/mainboard/tyan/s2875/romstage.c +++ b/src/mainboard/tyan/s2875/romstage.c @@ -52,7 +52,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "northbridge/amd/amdk8/resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/tyan/s2880/romstage.c b/src/mainboard/tyan/s2880/romstage.c index 9a5a017511e4..13cc01e518fd 100644 --- a/src/mainboard/tyan/s2880/romstage.c +++ b/src/mainboard/tyan/s2880/romstage.c @@ -52,7 +52,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/tyan/s2881/romstage.c b/src/mainboard/tyan/s2881/romstage.c index 9ec697fbfe11..dad2b6baf10b 100644 --- a/src/mainboard/tyan/s2881/romstage.c +++ b/src/mainboard/tyan/s2881/romstage.c @@ -51,7 +51,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c index 9a5a017511e4..13cc01e518fd 100644 --- a/src/mainboard/tyan/s2882/romstage.c +++ b/src/mainboard/tyan/s2882/romstage.c @@ -52,7 +52,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/tyan/s2885/romstage.c b/src/mainboard/tyan/s2885/romstage.c index c5ec60475374..a2dc9906539f 100644 --- a/src/mainboard/tyan/s2885/romstage.c +++ b/src/mainboard/tyan/s2885/romstage.c @@ -51,7 +51,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/tyan/s2891/romstage.c b/src/mainboard/tyan/s2891/romstage.c index 7ce92299f03e..aa0385bd5963 100644 --- a/src/mainboard/tyan/s2891/romstage.c +++ b/src/mainboard/tyan/s2891/romstage.c @@ -38,7 +38,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "southbridge/nvidia/ck804/early_setup_ss.h" #include "southbridge/nvidia/ck804/early_setup.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/tyan/s2892/romstage.c b/src/mainboard/tyan/s2892/romstage.c index 514dd8a4d5f1..5d6ff2add9c4 100644 --- a/src/mainboard/tyan/s2892/romstage.c +++ b/src/mainboard/tyan/s2892/romstage.c @@ -45,7 +45,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+45, ~(0xff),((0<<4)|(0<<2)|(0<<0)),/* P7,GPIO46, PCIXB_PRSNT2_L*/ \ #include "southbridge/nvidia/ck804/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/tyan/s2895/romstage.c b/src/mainboard/tyan/s2895/romstage.c index 28325da37b21..4f0e552ed45e 100644 --- a/src/mainboard/tyan/s2895/romstage.c +++ b/src/mainboard/tyan/s2895/romstage.c @@ -63,7 +63,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+45, ~(0xff),((0<<4)|(0<<2)|(0<<0)),/* P7,GPIO46, PCIXB_PRSNT2_L*/ #include "southbridge/nvidia/ck804/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index 36dcafcf2d1d..7957f95ab513 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -75,7 +75,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "southbridge/nvidia/mcp55/early_setup_ss.h" #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 6e9a5ec8d63d..9c861570acd7 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -71,7 +71,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "southbridge/nvidia/mcp55/early_setup_ss.h" #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" diff --git a/src/mainboard/tyan/s4880/romstage.c b/src/mainboard/tyan/s4880/romstage.c index f1a592ac0ab2..2b6470c2c98c 100644 --- a/src/mainboard/tyan/s4880/romstage.c +++ b/src/mainboard/tyan/s4880/romstage.c @@ -71,7 +71,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #define RC0 ((1<<2)<<8) diff --git a/src/mainboard/tyan/s4882/romstage.c b/src/mainboard/tyan/s4882/romstage.c index 6e117cecf470..60dbdf89a7af 100644 --- a/src/mainboard/tyan/s4882/romstage.c +++ b/src/mainboard/tyan/s4882/romstage.c @@ -79,7 +79,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #define RC0 ((1<<2)<<8) diff --git a/src/mainboard/winent/mb6047/romstage.c b/src/mainboard/winent/mb6047/romstage.c index 701f1582e7e5..b180ef7a356f 100644 --- a/src/mainboard/winent/mb6047/romstage.c +++ b/src/mainboard/winent/mb6047/romstage.c @@ -37,7 +37,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "southbridge/nvidia/ck804/early_setup_ss.h" #include "southbridge/nvidia/ck804/early_setup.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #if CONFIG_SET_FIDVID #include "cpu/amd/model_fxx/fidvid.c" |