diff options
31 files changed, 53 insertions, 188 deletions
diff --git a/src/arch/i386/include/arch/cpu.h b/src/arch/i386/include/arch/cpu.h index d43c847cefca..47d4baf63b56 100644 --- a/src/arch/i386/include/arch/cpu.h +++ b/src/arch/i386/include/arch/cpu.h @@ -104,7 +104,7 @@ static inline unsigned int cpuid_edx(unsigned int op) #define X86_VENDOR_SIS 10 #define X86_VENDOR_UNKNOWN 0xff -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) && defined( __GNUC__) +#if !defined(__PRE_RAM__) #include <device/device.h> diff --git a/src/arch/i386/include/arch/hlt.h b/src/arch/i386/include/arch/hlt.h index 931e933fc702..ddfe1699546e 100644 --- a/src/arch/i386/include/arch/hlt.h +++ b/src/arch/i386/include/arch/hlt.h @@ -1,7 +1,7 @@ #ifndef ARCH_HLT_H #define ARCH_HLT_H -#if defined( __ROMCC__) && !defined(__PRE_RAM__) && !defined(__GNUC__) +#if defined(__ROMCC__) static void hlt(void) { __builtin_hlt(); diff --git a/src/arch/i386/include/arch/io.h b/src/arch/i386/include/arch/io.h index e2e15ec7622c..3a76579fbc7c 100644 --- a/src/arch/i386/include/arch/io.h +++ b/src/arch/i386/include/arch/io.h @@ -9,7 +9,7 @@ * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" * versions of the single-IO instructions (inb_p/inw_p/..). */ -#if defined( __ROMCC__ ) && !defined (__GNUC__) +#if defined(__ROMCC__) static inline void outb(uint8_t value, uint16_t port) { __builtin_outb(value, port); @@ -42,7 +42,6 @@ static inline uint32_t inl(uint16_t port) return __builtin_inl(port); } #else - static inline void outb(uint8_t value, uint16_t port) { __asm__ __volatile__ ("outb %b0, %w1" : : "a" (value), "Nd" (port)); @@ -78,8 +77,7 @@ static inline uint32_t inl(uint16_t port) __asm__ __volatile__ ("inl %w1, %0" : "=a"(value) : "Nd" (port)); return value; } - -#endif /* __ROMCC__ && !__GNUC__*/ +#endif /* __ROMCC__ */ static inline void outsb(uint16_t port, const void *addr, unsigned long count) { @@ -136,6 +134,7 @@ static inline void insl(uint16_t port, void *addr, unsigned long count) ); } +#if 0 /* XXX XXX XXX This is a story from the evil API from hell XXX XXX XXX * We have different functions for memory access in pre-ram stage and ram * stage. Those in pre-ram stage are called write32 and expect the address @@ -173,6 +172,7 @@ static inline uint32_t readl(const volatile void *addr) { return *(volatile uint32_t *) addr; } +#endif #if !defined(__PRE_RAM__) static inline __attribute__((always_inline)) uint8_t read8(unsigned long addr) diff --git a/src/arch/i386/lib/console.c b/src/arch/i386/lib/console.c index 15d65a31c732..69b5a66f38aa 100644 --- a/src/arch/i386/lib/console.c +++ b/src/arch/i386/lib/console.c @@ -19,6 +19,19 @@ void console_init(void) print_info(console_test); } + +void post_code(u8 value) +{ +#if !defined(CONFIG_NO_POST) || CONFIG_NO_POST==0 +#if CONFIG_SERIAL_POST==1 + print_emerg("POST: 0x"); + print_emerg_hex8(value); + print_emerg("\r\n"); +#endif + outb(value, 0x80); +#endif +} + void die(const char *str) { print_emerg(str); diff --git a/src/arch/i386/lib/console_print.c b/src/arch/i386/lib/console_print.c index 0aa540d15367..2acec2308ac3 100644 --- a/src/arch/i386/lib/console_print.c +++ b/src/arch/i386/lib/console_print.c @@ -62,10 +62,6 @@ static void __console_tx_string(int loglevel, const char *str) } } -/* Actually this should say defined(__ROMCC__) but that define is explicitly - * set in some romstage.c files to trigger the simple device_t version to be used. - * So __GNUCC__ does the right thing here. - */ #if defined (__ROMCC__) #define STATIC #else diff --git a/src/include/cpu/amd/dualcore.h b/src/include/cpu/amd/dualcore.h index 1d338406686b..58cf945aba1f 100644 --- a/src/include/cpu/amd/dualcore.h +++ b/src/include/cpu/amd/dualcore.h @@ -15,7 +15,7 @@ struct node_core_id { struct node_core_id get_node_core_id(unsigned int nb_cfg_54); #endif -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) struct device; unsigned get_apicid_base(unsigned ioapic_num); void amd_sibling_init(struct device *cpu); diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index d86655dcdd6f..c7b3fcae7d33 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -31,8 +31,8 @@ #define TOP_MEM_MASK 0x007fffff #define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10) -#if !defined( __ROMCC__ ) && !defined (ASSEMBLY) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) && !defined(ASSEMBLY) void amd_setup_mtrrs(void); -#endif /* __ROMCC__ */ +#endif #endif /* CPU_AMD_MTRR_H */ diff --git a/src/include/cpu/amd/quadcore.h b/src/include/cpu/amd/quadcore.h index f7b2d09a1919..7bf84b4bce91 100644 --- a/src/include/cpu/amd/quadcore.h +++ b/src/include/cpu/amd/quadcore.h @@ -34,7 +34,7 @@ struct node_core_id { struct node_core_id get_node_core_id(u32 nb_cfg_54); #endif -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) struct device; u32 get_apicid_base(u32 ioapic_num); void amd_sibling_init(struct device *cpu); diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h index 22bd1e7e47e8..55d39382dbd6 100644 --- a/src/include/cpu/x86/cache.h +++ b/src/include/cpu/x86/cache.h @@ -41,8 +41,8 @@ static inline void disable_cache(void) wbinvd(); } -#if !defined( __ROMCC__) && !defined(__PRE_RAM__) && defined (__GNUC__) +#if !defined(__PRE_RAM__) void x86_enable_cache(void); -#endif /* !__ROMCC__ */ +#endif #endif /* CPU_X86_CACHE */ diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h index de99deebfe66..8b44a6cb662f 100644 --- a/src/include/cpu/x86/lapic.h +++ b/src/include/cpu/x86/lapic.h @@ -69,7 +69,7 @@ static inline __attribute__((always_inline)) void stop_this_cpu(void) void stop_this_cpu(void); #endif -#if ! defined (__ROMCC__) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) #define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr)))) @@ -106,7 +106,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz return x; } - static inline void lapic_write_atomic(unsigned long reg, unsigned long v) { xchg((volatile unsigned long *)(LAPIC_DEFAULT_BASE+reg), v); @@ -150,14 +149,11 @@ static inline int lapic_remote_read(int apicid, int reg, unsigned long *pvalue) void setup_lapic(void); - #if CONFIG_SMP == 1 struct device; int start_cpu(struct device *cpu); - #endif /* CONFIG_SMP */ - -#endif /* !__ROMCC__ && !__PRE_RAM__ */ +#endif /* !__PRE_RAM__ */ #endif /* CPU_X86_LAPIC_H */ diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index 69b4d8e78ae6..cbbd5cfd855a 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -1,7 +1,7 @@ #ifndef CPU_X86_MSR_H #define CPU_X86_MSR_H -#if defined( __ROMCC__) +#if defined(__ROMCC__) typedef __builtin_msr_t msr_t; @@ -45,5 +45,4 @@ static inline void wrmsr(unsigned index, msr_t msr) #endif /* __ROMCC__ */ - #endif /* CPU_X86_MSR_H */ diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index 2243fe308001..2da2beefc92a 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -32,18 +32,15 @@ #define MTRRfix4K_F8000_MSR 0x26f -#if !defined(__ROMCC__) && !defined (ASSEMBLY) && !defined(__PRE_RAM__) - +#if !defined (ASSEMBLY) && !defined(__PRE_RAM__) #include <device/device.h> - void enable_fixed_mtrr(void); void x86_setup_var_mtrrs(unsigned address_bits); void x86_setup_mtrrs(unsigned address_bits); int x86_mtrr_check(void); void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res); void x86_setup_fixed_mtrrs(void); - -#endif /* __ROMCC__ */ +#endif #endif /* CPU_X86_MTRR_H */ diff --git a/src/include/cpu/x86/tsc.h b/src/include/cpu/x86/tsc.h index 5531993f7d9f..c57362755a5b 100644 --- a/src/include/cpu/x86/tsc.h +++ b/src/include/cpu/x86/tsc.h @@ -17,7 +17,8 @@ static inline tsc_t rdtsc(void) return res; } -#if !defined( __ROMCC__ ) && !defined (__PRE_RAM__) +#if !defined(__ROMCC__) +/* Too many registers for ROMCC */ static inline unsigned long long rdtscll(void) { unsigned long long val; diff --git a/src/include/stdlib.h b/src/include/stdlib.h index 8742fdfe85a0..45420d787640 100644 --- a/src/include/stdlib.h +++ b/src/include/stdlib.h @@ -11,7 +11,7 @@ #define MIN(a,b) ((a) < (b) ? (a) : (b)) #define MAX(a,b) ((a) > (b) ? (a) : (b)) -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) void *malloc(size_t size); void free(void *ptr); #endif diff --git a/src/include/string.h b/src/include/string.h index 9e3c08450ee8..b4edf432ac61 100644 --- a/src/include/string.h +++ b/src/include/string.h @@ -8,7 +8,7 @@ void *memcpy(void *dest, const void *src, size_t n); void *memmove(void *dest, const void *src, size_t n); void *memset(void *s, int c, size_t n); int memcmp(const void *s1, const void *s2, size_t n); -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) int sprintf(char * buf, const char *fmt, ...); #endif @@ -41,7 +41,7 @@ static inline char *strchr(const char *s, int c) return 0; } -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) static inline char *strdup(const char *s) { size_t sz = strlen(s) + 1; diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index f6c862443a11..5198a638b320 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -52,12 +52,6 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" - -/* FIXME: Use console.c post_code function */ -static void post_code(u8 value) { - outb(value, 0x80); -} - #include "arch/i386/lib/console.c" #include "pc80/serial.c" #include "lib/ramtest.c" diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index 8244746c1ed1..fa65000b8900 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -52,12 +52,6 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" - -/* FIXME: Use console.c post_code function */ -static void post_code(u8 value) { - outb(value, 0x80); -} - #include "arch/i386/lib/console.c" #include "pc80/serial.c" #include "lib/ramtest.c" diff --git a/src/mainboard/dell/s1850/reset.c b/src/mainboard/dell/s1850/reset.c index d00e6181a9a8..745f187cae97 100644 --- a/src/mainboard/dell/s1850/reset.c +++ b/src/mainboard/dell/s1850/reset.c @@ -1,18 +1,6 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/pci.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#else +#if defined (__PRE_RAM__) #include <arch/romcc_io.h> #endif @@ -20,6 +8,7 @@ void soft_reset(void) { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); diff --git a/src/mainboard/intel/eagleheights/reset.c b/src/mainboard/intel/eagleheights/reset.c index 1388bcf6b4db..006c746dbb31 100644 --- a/src/mainboard/intel/eagleheights/reset.c +++ b/src/mainboard/intel/eagleheights/reset.c @@ -21,20 +21,8 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} +#if defined (__PRE_RAM__) +#include <arch/romcc_io.h> #endif void soft_reset(void) diff --git a/src/mainboard/intel/jarrell/reset.c b/src/mainboard/intel/jarrell/reset.c index 3b79e439e24a..fb379bd37293 100644 --- a/src/mainboard/intel/jarrell/reset.c +++ b/src/mainboard/intel/jarrell/reset.c @@ -1,42 +1,25 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif +#include <arch/romcc_io.h> void soft_reset(void) { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); outb(0x06, 0xcf9); } + void full_reset(void) { - device_t dev; /* Enable power on after power fail... */ - dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801ER_LPC), 0); - if (dev != PCI_DEV_INVALID) { - unsigned byte; - byte = pci_read_config8(dev, 0xa4); - byte &= 0xfe; - pci_write_config8(dev, 0xa4, byte); - - } + unsigned byte; + byte = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4); + byte &= 0xfe; + pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, byte); outb(0x0e, 0xcf9); } diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index 114e3c6fbe18..51c29d4e0437 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -49,11 +49,6 @@ // for enable the FAN #include "southbridge/nvidia/mcp55/mcp55_early_smbus.c" - -static void post_code(u8 value) { - outb(value, 0x80); -} - #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "lib/ramtest.c" diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index 8c56a499063d..7014713601f4 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -50,10 +50,6 @@ // for enable the FAN #include "southbridge/nvidia/mcp55/mcp55_early_smbus.c" -static void post_code(u8 value) { - outb(value, 0x80); -} - #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "lib/ramtest.c" diff --git a/src/mainboard/supermicro/x6dai_g/reset.c b/src/mainboard/supermicro/x6dai_g/reset.c index 1ac210e2d2a7..2f21605e7c6a 100644 --- a/src/mainboard/supermicro/x6dai_g/reset.c +++ b/src/mainboard/supermicro/x6dai_g/reset.c @@ -1,20 +1,5 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif void soft_reset(void) { diff --git a/src/mainboard/supermicro/x6dhe_g/reset.c b/src/mainboard/supermicro/x6dhe_g/reset.c index 1ac210e2d2a7..1b1bc68d4b83 100644 --- a/src/mainboard/supermicro/x6dhe_g/reset.c +++ b/src/mainboard/supermicro/x6dhe_g/reset.c @@ -1,25 +1,11 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif void soft_reset(void) { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); diff --git a/src/mainboard/supermicro/x6dhe_g2/reset.c b/src/mainboard/supermicro/x6dhe_g2/reset.c index 1ac210e2d2a7..1b1bc68d4b83 100644 --- a/src/mainboard/supermicro/x6dhe_g2/reset.c +++ b/src/mainboard/supermicro/x6dhe_g2/reset.c @@ -1,25 +1,11 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif void soft_reset(void) { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); diff --git a/src/mainboard/supermicro/x6dhr_ig/reset.c b/src/mainboard/supermicro/x6dhr_ig/reset.c index 1ac210e2d2a7..1b1bc68d4b83 100644 --- a/src/mainboard/supermicro/x6dhr_ig/reset.c +++ b/src/mainboard/supermicro/x6dhr_ig/reset.c @@ -1,25 +1,11 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif void soft_reset(void) { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); diff --git a/src/mainboard/supermicro/x6dhr_ig2/reset.c b/src/mainboard/supermicro/x6dhr_ig2/reset.c index 1ac210e2d2a7..1b1bc68d4b83 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/reset.c +++ b/src/mainboard/supermicro/x6dhr_ig2/reset.c @@ -1,25 +1,11 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif void soft_reset(void) { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index e75ef0780c0f..bdcb9fd0cd26 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -48,11 +48,6 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" - -static void post_code(u8 value) { - outb(value, 0x80); -} - #include "pc80/serial.c" #include "arch/i386/lib/console.c" #if CONFIG_USBDEBUG_DIRECT diff --git a/src/northbridge/via/cn400/cn400.h b/src/northbridge/via/cn400/cn400.h index 06367db27064..3c9e8fd52a95 100644 --- a/src/northbridge/via/cn400/cn400.h +++ b/src/northbridge/via/cn400/cn400.h @@ -18,7 +18,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef __ROMCC__ +#ifndef __PRE_RAM__ static void cn400_noop(void) { } diff --git a/src/northbridge/via/cn700/cn700.h b/src/northbridge/via/cn700/cn700.h index 400aaf308a85..df139cef35e5 100644 --- a/src/northbridge/via/cn700/cn700.h +++ b/src/northbridge/via/cn700/cn700.h @@ -18,7 +18,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) +#if !defined (__PRE_RAM__) static void cn700_noop() { } diff --git a/src/northbridge/via/vx800/vx800.h b/src/northbridge/via/vx800/vx800.h index f23974342e32..5e1c4df205b2 100644 --- a/src/northbridge/via/vx800/vx800.h +++ b/src/northbridge/via/vx800/vx800.h @@ -20,7 +20,7 @@ #ifndef VX800_H #define VX800_H 1 -#ifndef __ROMCC__ +#ifndef __PRE_RAM__ static void vx800_noop() { } |