diff options
8 files changed, 45 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 1a56d35dd869..7c95bb696c67 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -244,6 +244,7 @@ config MAINBOARD_PART_NUMBER default "Yavilla" if BOARD_GOOGLE_YAVILLA default "Gothrax" if BOARD_GOOGLE_GOTHRAX default "Craaskov" if BOARD_GOOGLE_CRAASKOV + default "Pirrha" if BOARD_GOOGLE_PIRRHA config VARIANT_DIR default "brya0" if BOARD_GOOGLE_BRYA0 @@ -293,6 +294,7 @@ config VARIANT_DIR default "yavilla" if BOARD_GOOGLE_YAVILLA default "gothrax" if BOARD_GOOGLE_GOTHRAX default "craaskov" if BOARD_GOOGLE_CRAASKOV + default "pirrha" if BOARD_GOOGLE_PIRRHA config VBOOT select VBOOT_EARLY_EC_SYNC if !BOARD_GOOGLE_BASEBOARD_NISSA diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index be67f5670c9d..785c60ac87c2 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -396,3 +396,7 @@ config BOARD_GOOGLE_GOTHRAX config BOARD_GOOGLE_CRAASKOV bool "-> Craaskov" select BOARD_GOOGLE_BASEBOARD_NISSA + +config BOARD_GOOGLE_PIRRHA + bool "-> Pirrha" + select BOARD_GOOGLE_BASEBOARD_NISSA diff --git a/src/mainboard/google/brya/variants/pirrha/include/variant/ec.h b/src/mainboard/google/brya/variants/pirrha/include/variant/ec.h new file mode 100644 index 000000000000..7a2a6ff8b774 --- /dev/null +++ b/src/mainboard/google/brya/variants/pirrha/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __VARIANT_EC_H__ +#define __VARIANT_EC_H__ + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/brya/variants/pirrha/include/variant/gpio.h b/src/mainboard/google/brya/variants/pirrha/include/variant/gpio.h new file mode 100644 index 000000000000..c4fe342621e6 --- /dev/null +++ b/src/mainboard/google/brya/variants/pirrha/include/variant/gpio.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef VARIANT_GPIO_H +#define VARIANT_GPIO_H + +#include <baseboard/gpio.h> + +#endif diff --git a/src/mainboard/google/brya/variants/pirrha/memory/Makefile.inc b/src/mainboard/google/brya/variants/pirrha/memory/Makefile.inc new file mode 100644 index 000000000000..eace2e443e20 --- /dev/null +++ b/src/mainboard/google/brya/variants/pirrha/memory/Makefile.inc @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. + +SPD_SOURCES = placeholder diff --git a/src/mainboard/google/brya/variants/pirrha/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/pirrha/memory/dram_id.generated.txt new file mode 100644 index 000000000000..fa247902eeee --- /dev/null +++ b/src/mainboard/google/brya/variants/pirrha/memory/dram_id.generated.txt @@ -0,0 +1 @@ +DRAM Part Name ID to assign diff --git a/src/mainboard/google/brya/variants/pirrha/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/pirrha/memory/mem_parts_used.txt new file mode 100644 index 000000000000..96211370d91b --- /dev/null +++ b/src/mainboard/google/brya/variants/pirrha/memory/mem_parts_used.txt @@ -0,0 +1,11 @@ +# This is a CSV file containing a list of memory parts used by this variant. +# One part per line with an optional fixed ID in column 2. +# Only include a fixed ID if it is required for legacy reasons! +# Generated IDs are dependent on the order of parts in this file, +# so new parts must always be added at the end of the file! +# +# Generate an updated Makefile.inc and dram_id.generated.txt by running the +# part_id_gen tool from util/spd_tools. +# See util/spd_tools/README.md for more details and instructions. + +# Part Name diff --git a/src/mainboard/google/brya/variants/pirrha/overridetree.cb b/src/mainboard/google/brya/variants/pirrha/overridetree.cb new file mode 100644 index 000000000000..4f2c04a57af4 --- /dev/null +++ b/src/mainboard/google/brya/variants/pirrha/overridetree.cb @@ -0,0 +1,6 @@ +chip soc/intel/alderlake + + device domain 0 on + end + +end |