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-rw-r--r--configs/config.lenovo_t420_static_option_table_no_mem_fuses2
-rw-r--r--src/mainboard/lenovo/t420/Kconfig20
-rw-r--r--src/mainboard/lenovo/t420/board.fmd16
-rw-r--r--src/mainboard/lenovo/t420/cmos.layout3
-rw-r--r--src/mainboard/lenovo/t420/vboot-rwa.fmd29
-rw-r--r--src/mainboard/lenovo/t420s/Kconfig20
-rw-r--r--src/mainboard/lenovo/t420s/board.fmd16
-rw-r--r--src/mainboard/lenovo/t420s/cmos.layout3
-rw-r--r--src/mainboard/lenovo/t420s/vboot-rwa.fmd29
-rw-r--r--src/mainboard/lenovo/t520/Kconfig20
-rw-r--r--src/mainboard/lenovo/t520/board.fmd16
-rw-r--r--src/mainboard/lenovo/t520/cmos.layout3
-rw-r--r--src/mainboard/lenovo/t520/vboot-rwa.fmd29
-rw-r--r--src/mainboard/lenovo/x220/Kconfig19
-rw-r--r--src/mainboard/lenovo/x220/board.fmd16
-rw-r--r--src/mainboard/lenovo/x220/cmos.layout3
-rw-r--r--src/mainboard/lenovo/x220/vboot-rwa.fmd29
17 files changed, 273 insertions, 0 deletions
diff --git a/configs/config.lenovo_t420_static_option_table_no_mem_fuses b/configs/config.lenovo_t420_static_option_table_no_mem_fuses
index a268d88b78de..0a3513cfac4f 100644
--- a/configs/config.lenovo_t420_static_option_table_no_mem_fuses
+++ b/configs/config.lenovo_t420_static_option_table_no_mem_fuses
@@ -4,4 +4,6 @@ CONFIG_VENDOR_LENOVO=y
CONFIG_BOARD_LENOVO_T420=y
CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES=y
CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS=y
+CONFIG_VBOOT=y
+CONFIG_H8_FN_KEY_AS_VBOOT_RECOVERY_SW=y
# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set
diff --git a/src/mainboard/lenovo/t420/Kconfig b/src/mainboard/lenovo/t420/Kconfig
index ce81907ccbcb..3d3b56ae22d1 100644
--- a/src/mainboard/lenovo/t420/Kconfig
+++ b/src/mainboard/lenovo/t420/Kconfig
@@ -28,6 +28,26 @@ config BOARD_SPECIFIC_OPTIONS
# Workaround for EC/KBC IRQ1.
select SERIRQ_CONTINUOUS_MODE
+config VBOOT
+ select VBOOT_VBNV_CMOS
+ select GBB_FLAG_DISABLE_LID_SHUTDOWN
+ select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
+ select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
+ select GBB_FLAG_DISABLE_FWMP
+ select HAS_RECOVERY_MRC_CACHE
+
+config VBOOT_SLOTS_RW_A
+ default y
+
+config VBOOT_VBNV_OFFSET
+ hex
+ default 0x2a
+
+config FMDFILE
+ string
+ default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT
+ default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd"
+
config MAINBOARD_DIR
string
default lenovo/t420
diff --git a/src/mainboard/lenovo/t420/board.fmd b/src/mainboard/lenovo/t420/board.fmd
new file mode 100644
index 000000000000..04cf827a87c6
--- /dev/null
+++ b/src/mainboard/lenovo/t420/board.fmd
@@ -0,0 +1,16 @@
+FLASH@0xff800000 0x800000 {
+ SI_ALL@0x0 0x500000 {
+ SI_DESC@0x0 0x1000
+ SI_GBE@0x1000 0x2000
+ SI_ME@0x3000 0x4ed000
+ }
+ SI_BIOS@0x500000 0x300000 {
+ RW_MRC_CACHE@0 0x10000
+ SMMSTORE(PRESERVE)@0x10000 0x40000
+
+ WP_RO@0x50000 0x2a0000 {
+ FMAP@0x0 0x800
+ COREBOOT(CBFS)@0x1000 0x29f000
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/t420/cmos.layout b/src/mainboard/lenovo/t420/cmos.layout
index f55c2037d564..a9f5f5ff4714 100644
--- a/src/mainboard/lenovo/t420/cmos.layout
+++ b/src/mainboard/lenovo/t420/cmos.layout
@@ -81,6 +81,9 @@ entries
440 8 h 0 volume
+# VBOOT
+448 128 r 0 vbnv
+
# SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed
928 32 r 0 mrc_scrambler_seed_s3
diff --git a/src/mainboard/lenovo/t420/vboot-rwa.fmd b/src/mainboard/lenovo/t420/vboot-rwa.fmd
new file mode 100644
index 000000000000..8a4cd3b47764
--- /dev/null
+++ b/src/mainboard/lenovo/t420/vboot-rwa.fmd
@@ -0,0 +1,29 @@
+FLASH@0xff800000 0x800000 {
+ SI_ALL@0x0 0x500000 {
+ SI_DESC@0x0 0x1000
+ SI_GBE@0x1000 0x2000
+ SI_ME@0x3000 0x4ed000
+ }
+ SI_BIOS@0x500000 0x300000 {
+ RW_SECTION_A@0x00000 0x180000 {
+ VBLOCK_A@0x0 0x10000
+ FW_MAIN_A(CBFS)@0x10000 0x16ffc0
+ RW_FWID_A@0x17ffc0 0x40
+ }
+ UNIFIED_MRC_CACHE@0x180000 0x20000 {
+ RECOVERY_MRC_CACHE@0x0 0x10000
+ RW_MRC_CACHE@0x10000 0x10000
+ }
+ RW_VPD(PRESERVE)@0x1a0000 0x1000
+ SMMSTORE(PRESERVE)@0x1a1000 0x40000
+
+ WP_RO@0x1e1000 0x11f000 {
+ FMAP@0x0 0x800
+ RO_FRID@0x800 0x40
+ RO_PADDING@0x840 0x7c0
+ RO_VPD(PRESERVE)@0x1000 0x1000
+ GBB@0x2000 0x1e000
+ COREBOOT(CBFS)@0x20000 0xff000
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/t420s/Kconfig b/src/mainboard/lenovo/t420s/Kconfig
index c5efb556537e..1383d4166c23 100644
--- a/src/mainboard/lenovo/t420s/Kconfig
+++ b/src/mainboard/lenovo/t420s/Kconfig
@@ -27,6 +27,26 @@ config BOARD_SPECIFIC_OPTIONS
# Workaround for EC/KBC IRQ1.
select SERIRQ_CONTINUOUS_MODE
+config VBOOT
+ select VBOOT_VBNV_CMOS
+ select GBB_FLAG_DISABLE_LID_SHUTDOWN
+ select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
+ select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
+ select GBB_FLAG_DISABLE_FWMP
+ select HAS_RECOVERY_MRC_CACHE
+
+config VBOOT_SLOTS_RW_A
+ default y
+
+config VBOOT_VBNV_OFFSET
+ hex
+ default 0x2a
+
+config FMDFILE
+ string
+ default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT
+ default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd"
+
config MAINBOARD_DIR
string
default lenovo/t420s
diff --git a/src/mainboard/lenovo/t420s/board.fmd b/src/mainboard/lenovo/t420s/board.fmd
new file mode 100644
index 000000000000..04cf827a87c6
--- /dev/null
+++ b/src/mainboard/lenovo/t420s/board.fmd
@@ -0,0 +1,16 @@
+FLASH@0xff800000 0x800000 {
+ SI_ALL@0x0 0x500000 {
+ SI_DESC@0x0 0x1000
+ SI_GBE@0x1000 0x2000
+ SI_ME@0x3000 0x4ed000
+ }
+ SI_BIOS@0x500000 0x300000 {
+ RW_MRC_CACHE@0 0x10000
+ SMMSTORE(PRESERVE)@0x10000 0x40000
+
+ WP_RO@0x50000 0x2a0000 {
+ FMAP@0x0 0x800
+ COREBOOT(CBFS)@0x1000 0x29f000
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/t420s/cmos.layout b/src/mainboard/lenovo/t420s/cmos.layout
index 2be55f67c7a5..172191a59ae8 100644
--- a/src/mainboard/lenovo/t420s/cmos.layout
+++ b/src/mainboard/lenovo/t420s/cmos.layout
@@ -81,6 +81,9 @@ entries
440 8 h 0 volume
+# VBOOT
+448 128 r 0 vbnv
+
# SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed
928 32 r 0 mrc_scrambler_seed_s3
diff --git a/src/mainboard/lenovo/t420s/vboot-rwa.fmd b/src/mainboard/lenovo/t420s/vboot-rwa.fmd
new file mode 100644
index 000000000000..8a4cd3b47764
--- /dev/null
+++ b/src/mainboard/lenovo/t420s/vboot-rwa.fmd
@@ -0,0 +1,29 @@
+FLASH@0xff800000 0x800000 {
+ SI_ALL@0x0 0x500000 {
+ SI_DESC@0x0 0x1000
+ SI_GBE@0x1000 0x2000
+ SI_ME@0x3000 0x4ed000
+ }
+ SI_BIOS@0x500000 0x300000 {
+ RW_SECTION_A@0x00000 0x180000 {
+ VBLOCK_A@0x0 0x10000
+ FW_MAIN_A(CBFS)@0x10000 0x16ffc0
+ RW_FWID_A@0x17ffc0 0x40
+ }
+ UNIFIED_MRC_CACHE@0x180000 0x20000 {
+ RECOVERY_MRC_CACHE@0x0 0x10000
+ RW_MRC_CACHE@0x10000 0x10000
+ }
+ RW_VPD(PRESERVE)@0x1a0000 0x1000
+ SMMSTORE(PRESERVE)@0x1a1000 0x40000
+
+ WP_RO@0x1e1000 0x11f000 {
+ FMAP@0x0 0x800
+ RO_FRID@0x800 0x40
+ RO_PADDING@0x840 0x7c0
+ RO_VPD(PRESERVE)@0x1000 0x1000
+ GBB@0x2000 0x1e000
+ COREBOOT(CBFS)@0x20000 0xff000
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/t520/Kconfig b/src/mainboard/lenovo/t520/Kconfig
index 06f296bc6df4..ba17e8092b3b 100644
--- a/src/mainboard/lenovo/t520/Kconfig
+++ b/src/mainboard/lenovo/t520/Kconfig
@@ -27,6 +27,21 @@ config BOARD_LENOVO_BASEBOARD_T520
if BOARD_LENOVO_BASEBOARD_T520
+config VBOOT
+ select VBOOT_VBNV_CMOS
+ select GBB_FLAG_DISABLE_LID_SHUTDOWN
+ select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
+ select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
+ select GBB_FLAG_DISABLE_FWMP
+ select HAS_RECOVERY_MRC_CACHE
+
+config VBOOT_SLOTS_RW_A
+ default y
+
+config VBOOT_VBNV_OFFSET
+ hex
+ default 0x2a
+
config VARIANT_DIR
string
default "t520" if BOARD_LENOVO_T520
@@ -40,6 +55,11 @@ config DEVICETREE
string
default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+config FMDFILE
+ string
+ default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT
+ default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd"
+
config MAINBOARD_PART_NUMBER
string
default "ThinkPad T520" if BOARD_LENOVO_T520
diff --git a/src/mainboard/lenovo/t520/board.fmd b/src/mainboard/lenovo/t520/board.fmd
new file mode 100644
index 000000000000..04cf827a87c6
--- /dev/null
+++ b/src/mainboard/lenovo/t520/board.fmd
@@ -0,0 +1,16 @@
+FLASH@0xff800000 0x800000 {
+ SI_ALL@0x0 0x500000 {
+ SI_DESC@0x0 0x1000
+ SI_GBE@0x1000 0x2000
+ SI_ME@0x3000 0x4ed000
+ }
+ SI_BIOS@0x500000 0x300000 {
+ RW_MRC_CACHE@0 0x10000
+ SMMSTORE(PRESERVE)@0x10000 0x40000
+
+ WP_RO@0x50000 0x2a0000 {
+ FMAP@0x0 0x800
+ COREBOOT(CBFS)@0x1000 0x29f000
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/t520/cmos.layout b/src/mainboard/lenovo/t520/cmos.layout
index 1a7943e5a431..ec6ce858ebff 100644
--- a/src/mainboard/lenovo/t520/cmos.layout
+++ b/src/mainboard/lenovo/t520/cmos.layout
@@ -81,6 +81,9 @@ entries
#437 3 r 0 unused
440 8 h 0 volume
+# VBOOT
+448 128 r 0 vbnv
+
# SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed
928 32 r 0 mrc_scrambler_seed_s3
diff --git a/src/mainboard/lenovo/t520/vboot-rwa.fmd b/src/mainboard/lenovo/t520/vboot-rwa.fmd
new file mode 100644
index 000000000000..8a4cd3b47764
--- /dev/null
+++ b/src/mainboard/lenovo/t520/vboot-rwa.fmd
@@ -0,0 +1,29 @@
+FLASH@0xff800000 0x800000 {
+ SI_ALL@0x0 0x500000 {
+ SI_DESC@0x0 0x1000
+ SI_GBE@0x1000 0x2000
+ SI_ME@0x3000 0x4ed000
+ }
+ SI_BIOS@0x500000 0x300000 {
+ RW_SECTION_A@0x00000 0x180000 {
+ VBLOCK_A@0x0 0x10000
+ FW_MAIN_A(CBFS)@0x10000 0x16ffc0
+ RW_FWID_A@0x17ffc0 0x40
+ }
+ UNIFIED_MRC_CACHE@0x180000 0x20000 {
+ RECOVERY_MRC_CACHE@0x0 0x10000
+ RW_MRC_CACHE@0x10000 0x10000
+ }
+ RW_VPD(PRESERVE)@0x1a0000 0x1000
+ SMMSTORE(PRESERVE)@0x1a1000 0x40000
+
+ WP_RO@0x1e1000 0x11f000 {
+ FMAP@0x0 0x800
+ RO_FRID@0x800 0x40
+ RO_PADDING@0x840 0x7c0
+ RO_VPD(PRESERVE)@0x1000 0x1000
+ GBB@0x2000 0x1e000
+ COREBOOT(CBFS)@0x20000 0xff000
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/x220/Kconfig b/src/mainboard/lenovo/x220/Kconfig
index 16f42e850ecd..358cf8ec39c0 100644
--- a/src/mainboard/lenovo/x220/Kconfig
+++ b/src/mainboard/lenovo/x220/Kconfig
@@ -26,6 +26,21 @@ config BOARD_SPECIFIC_OPTIONS
# Workaround for EC/KBC IRQ1.
select SERIRQ_CONTINUOUS_MODE
+config VBOOT
+ select VBOOT_VBNV_CMOS
+ select GBB_FLAG_DISABLE_LID_SHUTDOWN
+ select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
+ select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
+ select GBB_FLAG_DISABLE_FWMP
+ select HAS_RECOVERY_MRC_CACHE
+
+config VBOOT_SLOTS_RW_A
+ default y
+
+config VBOOT_VBNV_OFFSET
+ hex
+ default 0x2a
+
config MAINBOARD_DIR
string
default lenovo/x220
@@ -35,6 +50,10 @@ config VARIANT_DIR
default "x220" if BOARD_LENOVO_X220 || BOARD_LENOVO_X220I
default "x1" if BOARD_LENOVO_X1
+config FMDFILE
+ string
+ default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT
+ default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd"
config MAINBOARD_PART_NUMBER
string
diff --git a/src/mainboard/lenovo/x220/board.fmd b/src/mainboard/lenovo/x220/board.fmd
new file mode 100644
index 000000000000..04cf827a87c6
--- /dev/null
+++ b/src/mainboard/lenovo/x220/board.fmd
@@ -0,0 +1,16 @@
+FLASH@0xff800000 0x800000 {
+ SI_ALL@0x0 0x500000 {
+ SI_DESC@0x0 0x1000
+ SI_GBE@0x1000 0x2000
+ SI_ME@0x3000 0x4ed000
+ }
+ SI_BIOS@0x500000 0x300000 {
+ RW_MRC_CACHE@0 0x10000
+ SMMSTORE(PRESERVE)@0x10000 0x40000
+
+ WP_RO@0x50000 0x2a0000 {
+ FMAP@0x0 0x800
+ COREBOOT(CBFS)@0x1000 0x29f000
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/x220/cmos.layout b/src/mainboard/lenovo/x220/cmos.layout
index d4a4ed337186..dc98010ea223 100644
--- a/src/mainboard/lenovo/x220/cmos.layout
+++ b/src/mainboard/lenovo/x220/cmos.layout
@@ -80,6 +80,9 @@ entries
#435 549 r 0 unused
440 8 h 0 volume
+# VBOOT
+448 128 r 0 vbnv
+
# SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed
928 32 r 0 mrc_scrambler_seed_s3
diff --git a/src/mainboard/lenovo/x220/vboot-rwa.fmd b/src/mainboard/lenovo/x220/vboot-rwa.fmd
new file mode 100644
index 000000000000..8a4cd3b47764
--- /dev/null
+++ b/src/mainboard/lenovo/x220/vboot-rwa.fmd
@@ -0,0 +1,29 @@
+FLASH@0xff800000 0x800000 {
+ SI_ALL@0x0 0x500000 {
+ SI_DESC@0x0 0x1000
+ SI_GBE@0x1000 0x2000
+ SI_ME@0x3000 0x4ed000
+ }
+ SI_BIOS@0x500000 0x300000 {
+ RW_SECTION_A@0x00000 0x180000 {
+ VBLOCK_A@0x0 0x10000
+ FW_MAIN_A(CBFS)@0x10000 0x16ffc0
+ RW_FWID_A@0x17ffc0 0x40
+ }
+ UNIFIED_MRC_CACHE@0x180000 0x20000 {
+ RECOVERY_MRC_CACHE@0x0 0x10000
+ RW_MRC_CACHE@0x10000 0x10000
+ }
+ RW_VPD(PRESERVE)@0x1a0000 0x1000
+ SMMSTORE(PRESERVE)@0x1a1000 0x40000
+
+ WP_RO@0x1e1000 0x11f000 {
+ FMAP@0x0 0x800
+ RO_FRID@0x800 0x40
+ RO_PADDING@0x840 0x7c0
+ RO_VPD(PRESERVE)@0x1000 0x1000
+ GBB@0x2000 0x1e000
+ COREBOOT(CBFS)@0x20000 0xff000
+ }
+ }
+}