diff options
| -rw-r--r-- | payloads/libpayload/arch/arm64/cache.c | 10 | ||||
| -rw-r--r-- | payloads/libpayload/arch/arm64/exception_asm.S | 15 |
2 files changed, 13 insertions, 12 deletions
diff --git a/payloads/libpayload/arch/arm64/cache.c b/payloads/libpayload/arch/arm64/cache.c index e89d49e4c8d7..1a9e7a60f9c9 100644 --- a/payloads/libpayload/arch/arm64/cache.c +++ b/payloads/libpayload/arch/arm64/cache.c @@ -39,7 +39,7 @@ void tlb_invalidate_all(void) { /* TLBIALL includes dTLB and iTLB on systems that have them. */ - tlbiall_el3(); + tlbiall_current(); dsb(); isb(); } @@ -127,18 +127,18 @@ void dcache_mmu_disable(void) uint32_t sctlr; dcache_clean_invalidate_all(); - sctlr = raw_read_sctlr_el3(); + sctlr = raw_read_sctlr_current(); sctlr &= ~(SCTLR_C | SCTLR_M); - raw_write_sctlr_el3(sctlr); + raw_write_sctlr_current(sctlr); } void dcache_mmu_enable(void) { uint32_t sctlr; - sctlr = raw_read_sctlr_el3(); + sctlr = raw_read_sctlr_current(); sctlr |= SCTLR_C | SCTLR_M; - raw_write_sctlr_el3(sctlr); + raw_write_sctlr_current(sctlr); } void cache_sync_instructions(void) diff --git a/payloads/libpayload/arch/arm64/exception_asm.S b/payloads/libpayload/arch/arm64/exception_asm.S index 8e69ddad86d5..c9e694ac5f03 100644 --- a/payloads/libpayload/arch/arm64/exception_asm.S +++ b/payloads/libpayload/arch/arm64/exception_asm.S @@ -27,6 +27,9 @@ * SUCH DAMAGE. */ +#define __ASSEMBLY__ +#include <arch/lib_helpers.h> + .text /* Macro for exception entry @@ -89,10 +92,10 @@ exception_prologue: stp x0, x1, [sp, #-16]! /* Save the exception reason on stack */ - mrs x1, esr_el3 + read_current x1, esr /* Save the return address on stack */ - mrs x0, elr_el3 + read_current x0, elr stp x0, x1, [sp, #-16]! ret @@ -106,8 +109,8 @@ exception_handler: /* Pop return address saved on stack */ ldp x0, x1, [sp], #16 - msr elr_el3, x0 - msr esr_el3, x1 + write_current elr, x0, x2 + write_current esr, x1, x2 /* Pop exception reason saved on stack, followed by regs x0-x30 */ ldp x0, x1, [sp], #16 ldp x2, x3, [sp], #16 @@ -129,7 +132,5 @@ exception_handler: .global set_vbar set_vbar: - /* Initialize the exception table address in vbar for EL3 */ - /* FIXME: Do we need to initialize for other levels too? EL1/EL2 */ - msr vbar_el3, x0 + write_current vbar, x0, x1 ret |