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-rw-r--r--src/mainboard/google/brya/variants/agah/variant.c18
1 files changed, 17 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/agah/variant.c b/src/mainboard/google/brya/variants/agah/variant.c
index 4e7f6d20f383..43aea8cf6dbb 100644
--- a/src/mainboard/google/brya/variants/agah/variant.c
+++ b/src/mainboard/google/brya/variants/agah/variant.c
@@ -5,7 +5,7 @@
#include <baseboard/variants.h>
#include <boardid.h>
#include <delay.h>
-#include <device/pci_ops.h>
+#include <device/pci.h>
#include <gpio.h>
#include <timer.h>
#include <types.h>
@@ -161,3 +161,19 @@ void variant_fill_ssdt(const struct device *dev)
acpigen_write_method_end();
acpigen_write_scope_end();
}
+
+void variant_finalize(void)
+{
+ /*
+ * Currently the `pch_pirq_init()` function in lpc_lib.c will program
+ * PIRQ IRQs for all PCI devices discovered during enumeration. This may
+ * not be correct for all devices, and causes strange behavior with the
+ * Nvidia dGPU; it will start out with IRQ 11 and then after a
+ * suspend/resume cycle, it will get programmed back to 16, so the Linux
+ * kernel must be doing some IRQ sanitization at some point. To fix
+ * this anomaly, explicitly program the IRQ to 16 (which we know is what
+ * IRQ it will eventually take).
+ */
+ const struct device *dgpu = DEV_PTR(dgpu);
+ pci_write_config8(dgpu, PCI_INTERRUPT_LINE, 16);
+}