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-rw-r--r--src/mainboard/intel/adlrvp/Kconfig8
-rw-r--r--src/mainboard/intel/adlrvp/Kconfig.name7
-rw-r--r--src/mainboard/intel/adlrvp/variants/adlrvp_p_mchp/overridetree.cb34
3 files changed, 46 insertions, 3 deletions
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 4a59c8bd2e51..c62adbe72483 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -1,4 +1,4 @@
-if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
+if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_P_MCHP || BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
config BOARD_SPECIFIC_OPTIONS
def_bool y
@@ -10,10 +10,11 @@ config BOARD_SPECIFIC_OPTIONS
select DRIVERS_I2C_GENERIC
select DRIVERS_INTEL_DPTF
select DRIVERS_INTEL_MIPI_CAMERA
- select DRIVERS_INTEL_PMC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M_EXT_EC
+ select DRIVERS_INTEL_PMC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M_EXT_EC || BOARD_INTEL_ADLRVP_P_MCHP
select DRIVERS_INTEL_SOUNDWIRE
select DRIVERS_USB_ACPI
select DRIVERS_SPI_ACPI
+ select EC_GOOGLE_CHROMEEC_ACPI_MEMMAP if BOARD_INTEL_ADLRVP_P_MCHP
select SOC_INTEL_ALDERLAKE
select SOC_INTEL_ALDERLAKE_PCH_M if BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
select HAVE_SPD_IN_CBFS
@@ -42,6 +43,7 @@ config MAINBOARD_DIR
config VARIANT_DIR
default "adlrvp_p" if BOARD_INTEL_ADLRVP_P
default "adlrvp_p_ext_ec" if BOARD_INTEL_ADLRVP_P_EXT_EC
+ default "adlrvp_p_mchp" if BOARD_INTEL_ADLRVP_P_MCHP
default "adlrvp_m" if BOARD_INTEL_ADLRVP_M
default "adlrvp_m_ext_ec" if BOARD_INTEL_ADLRVP_M_EXT_EC
@@ -75,7 +77,7 @@ config DIMM_SPD_SIZE
choice
prompt "ON BOARD EC"
default ADL_INTEL_EC if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_M
- default ADL_CHROME_EC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M_EXT_EC
+ default ADL_CHROME_EC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M_EXT_EC || BOARD_INTEL_ADLRVP_P_MCHP
help
This option allows you to select the on board EC to use.
Select whether the board has Intel EC or Chrome EC
diff --git a/src/mainboard/intel/adlrvp/Kconfig.name b/src/mainboard/intel/adlrvp/Kconfig.name
index 418ba12dfd55..95fe0e8b2420 100644
--- a/src/mainboard/intel/adlrvp/Kconfig.name
+++ b/src/mainboard/intel/adlrvp/Kconfig.name
@@ -7,6 +7,13 @@ config BOARD_INTEL_ADLRVP_P_EXT_EC
bool "Alderlake-P RVP with Chrome EC"
select INTEL_LPSS_UART_FOR_CONSOLE
+config BOARD_INTEL_ADLRVP_P_MCHP
+ bool "Alderlake-P RVP with Microchip EC"
+ select INTEL_LPSS_UART_FOR_CONSOLE
+ select DRIVERS_INTEL_MIPI_CAMERA
+ select SOC_INTEL_COMMON_BLOCK_IPU
+ select EC_GOOGLE_CHROMEEC_MEC
+
config BOARD_INTEL_ADLRVP_M
bool "Alderlake-M RVP"
select DRIVERS_UART_8250IO
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p_mchp/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p_mchp/overridetree.cb
new file mode 100644
index 000000000000..a23db8c0f989
--- /dev/null
+++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p_mchp/overridetree.cb
@@ -0,0 +1,34 @@
+chip soc/intel/alderlake
+
+ device domain 0 on
+ device ref pch_espi on
+ chip ec/google/chromeec
+ use conn0 as mux_conn[0]
+ use conn1 as mux_conn[1]
+ device pnp 0c09.0 on end
+ end
+ end
+ device ref pmc hidden
+ # The pmc_mux chip driver is a placeholder for the
+ # PMC.MUX device in the ACPI hierarchy.
+ chip drivers/intel/pmc_mux
+ device generic 0 on
+ chip drivers/intel/pmc_mux/conn
+ register "usb2_port_number" = "1"
+ register "usb3_port_number" = "1"
+ # SBU is fixed, HSL follows CC
+ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
+ device generic 0 alias conn0 on end
+ end
+ chip drivers/intel/pmc_mux/conn
+ register "usb2_port_number" = "2"
+ register "usb3_port_number" = "2"
+ # SBU is fixed, HSL follows CC
+ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
+ device generic 1 alias conn1 on end
+ end
+ end
+ end
+ end
+ end
+end