diff options
| -rw-r--r-- | src/mainboard/google/brya/variants/anahera/overridetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/anahera4es/overridetree.cb | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb index c9b3bd804574..e670f4a0daa1 100644 --- a/src/mainboard/google/brya/variants/anahera/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb @@ -62,6 +62,7 @@ chip soc/intel/alderlake .data_hold_time_ns = 50, }, }" + register "tcc_offset" = "3" # TCC of 97C register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Smart Card register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb index 0b6db9f95ef7..e04ff886a7a6 100644 --- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb @@ -54,6 +54,7 @@ chip soc/intel/alderlake .speed = I2C_SPEED_FAST, }, }" + register "tcc_offset" = "3" # TCC of 97C register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Smart Card register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port |