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-rw-r--r--src/soc/amd/cezanne/root_complex.c4
-rw-r--r--src/soc/amd/common/block/data_fabric/domain.c8
-rw-r--r--src/soc/amd/glinda/root_complex.c4
-rw-r--r--src/soc/amd/mendocino/root_complex.c4
-rw-r--r--src/soc/amd/phoenix/root_complex.c4
-rw-r--r--src/soc/amd/picasso/root_complex.c4
-rw-r--r--src/vendorcode/amd/opensil/genoa_poc/memmap.c2
7 files changed, 8 insertions, 22 deletions
diff --git a/src/soc/amd/cezanne/root_complex.c b/src/soc/amd/cezanne/root_complex.c
index 25867408bc16..876f79071895 100644
--- a/src/soc/amd/cezanne/root_complex.c
+++ b/src/soc/amd/cezanne/root_complex.c
@@ -111,8 +111,6 @@ void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
- fixed_io_range_reserved(dev, (*idx)++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
-
/* 0x0 - 0x9ffff */
ram_range(dev, (*idx)++, 0, 0xa0000);
@@ -134,8 +132,6 @@ void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
*/
ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
- mmconf_resource(dev, (*idx)++);
-
/* Reserve fixed IOMMU MMIO region */
mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);
diff --git a/src/soc/amd/common/block/data_fabric/domain.c b/src/soc/amd/common/block/data_fabric/domain.c
index 65735574d10d..f5d7216c04d1 100644
--- a/src/soc/amd/common/block/data_fabric/domain.c
+++ b/src/soc/amd/common/block/data_fabric/domain.c
@@ -191,6 +191,12 @@ static void add_data_fabric_io_regions(struct device *domain, unsigned long *idx
}
}
+static void add_pci_cfg_resources(struct device *domain, unsigned long *idx)
+{
+ fixed_io_range_reserved(domain, (*idx)++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
+ mmconf_resource(domain, (*idx)++);
+}
+
void amd_pci_domain_read_resources(struct device *domain)
{
unsigned long idx = 0;
@@ -203,6 +209,8 @@ void amd_pci_domain_read_resources(struct device *domain)
/* Only add the SoC's DRAM memory map and fixed resources once */
if (domain->path.domain.domain == 0) {
+ add_pci_cfg_resources(domain, &idx);
+
read_soc_memmap_resources(domain, &idx);
}
}
diff --git a/src/soc/amd/glinda/root_complex.c b/src/soc/amd/glinda/root_complex.c
index 37d189e64eb6..9d83f6fc525e 100644
--- a/src/soc/amd/glinda/root_complex.c
+++ b/src/soc/amd/glinda/root_complex.c
@@ -126,8 +126,6 @@ void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
- fixed_io_range_reserved(dev, (*idx)++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
-
/* 0x0 - 0x9ffff */
ram_range(dev, (*idx)++, 0, 0xa0000);
@@ -149,8 +147,6 @@ void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
*/
ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
- mmconf_resource(dev, (*idx)++);
-
/* Reserve fixed IOMMU MMIO region */
mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);
diff --git a/src/soc/amd/mendocino/root_complex.c b/src/soc/amd/mendocino/root_complex.c
index 7291058e3f9b..556124038aeb 100644
--- a/src/soc/amd/mendocino/root_complex.c
+++ b/src/soc/amd/mendocino/root_complex.c
@@ -154,8 +154,6 @@ void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
- fixed_io_range_reserved(dev, (*idx)++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
-
/* 0x0 - 0x9ffff */
ram_range(dev, (*idx)++, 0, 0xa0000);
@@ -177,8 +175,6 @@ void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
*/
ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
- mmconf_resource(dev, (*idx)++);
-
/* Reserve fixed IOMMU MMIO region */
mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);
diff --git a/src/soc/amd/phoenix/root_complex.c b/src/soc/amd/phoenix/root_complex.c
index 3e61df1a016f..1394b2c96b94 100644
--- a/src/soc/amd/phoenix/root_complex.c
+++ b/src/soc/amd/phoenix/root_complex.c
@@ -126,8 +126,6 @@ void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
- fixed_io_range_reserved(dev, (*idx)++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
-
/* 0x0 - 0x9ffff */
ram_range(dev, (*idx)++, 0, 0xa0000);
@@ -149,8 +147,6 @@ void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
*/
ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
- mmconf_resource(dev, (*idx)++);
-
/* Reserve fixed IOMMU MMIO region */
mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);
diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c
index ffe4f66f5be1..1e702ab8e575 100644
--- a/src/soc/amd/picasso/root_complex.c
+++ b/src/soc/amd/picasso/root_complex.c
@@ -111,8 +111,6 @@ void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
- fixed_io_range_reserved(dev, (*idx)++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
-
/* 0x0 - 0x9ffff */
ram_range(dev, (*idx)++, 0, 0xa0000);
@@ -132,8 +130,6 @@ void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
* cbmem_top() accounts for low UMA and TSEG if they are used. */
ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
- mmconf_resource(dev, (*idx)++);
-
/* Reserve fixed IOMMU MMIO region */
mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);
diff --git a/src/vendorcode/amd/opensil/genoa_poc/memmap.c b/src/vendorcode/amd/opensil/genoa_poc/memmap.c
index 1e633d9d7d0c..39b27ec2931e 100644
--- a/src/vendorcode/amd/opensil/genoa_poc/memmap.c
+++ b/src/vendorcode/amd/opensil/genoa_poc/memmap.c
@@ -114,8 +114,6 @@ void add_opensil_memmap(struct device *dev, unsigned long *idx)
if (mem_usable != top_mem)
reserved_ram_from_to(dev, (*idx)++, mem_usable, top_mem);
- mmconf_resource(dev, (*idx)++);
-
// Check if we're done
if (top_of_mem <= 0x100000000)
return;