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Diffstat (limited to 'src/drivers/uart/pl011.c')
-rw-r--r--src/drivers/uart/pl011.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c
index 64c279d1b449..06782a3b980f 100644
--- a/src/drivers/uart/pl011.c
+++ b/src/drivers/uart/pl011.c
@@ -7,6 +7,38 @@
void uart_init(unsigned int idx)
{
+ struct pl011_uart *regs = uart_platform_baseptr(idx);
+ uint32_t tmp;
+
+ if (!regs)
+ return;
+
+ /* Disable UART */
+ tmp = read32(&regs->cr);
+ tmp &= ~PL011_UARTCR_UARTEN;
+ write32(&regs->cr, tmp);
+
+ /*
+ * Program Divisor
+ * As per: PL011 Technical reference manual:
+ * BAUDDIV = (Fuartclk / (16 * baud_rate))
+ * Considering 6 bits(64) for UARTFBRD
+ * BAUDDIV = (Fuartclk * 4 / baud_rate)
+ */
+ tmp = uart_platform_refclk() * 4 / get_uart_baudrate();
+
+ write32(&regs->ibrd, tmp >> 6);
+ write32(&regs->fbrd, tmp & 0x3f);
+
+ /* Program LINE Control 8n1, FIFO enable */
+ tmp = read32(&regs->lcr_h);
+ tmp |= PL011_LINE_CONTROL;
+ write32(&regs->lcr_h, tmp);
+
+ /* Enable UART */
+ tmp = read32(&regs->cr);
+ tmp |= PL011_UARTCR_UARTEN | PL011_UARTCR_RXE | PL011_UARTCR_TXE;
+ write32(&regs->cr, tmp);
}
void uart_tx_byte(unsigned int idx, unsigned char data)