diff options
Diffstat (limited to 'src/include/device/pci_ids.h')
| -rw-r--r-- | src/include/device/pci_ids.h | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 5668053d1bc3..15a41ce072e7 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2908,13 +2908,6 @@ #define PCI_DID_INTEL_CNP_H_LPC_QM370 0xa30c #define PCI_DID_INTEL_CNP_H_LPC_HM370 0xa30d #define PCI_DID_INTEL_CNP_H_LPC_CM246 0xa30e -#define PCI_DID_INTEL_ICL_U_SUPER_U_ESPI 0x3480 -#define PCI_DID_INTEL_ICL_U_SUPER_U_ESPI_REV0 0x3481 -#define PCI_DID_INTEL_ICL_U_PREMIUM_ESPI 0x3482 -#define PCI_DID_INTEL_ICL_BASE_Y_ESPI 0x3483 -#define PCI_DID_INTEL_ICL_BASE_U_ESPI 0x3484 -#define PCI_DID_INTEL_ICL_Y_PREMIUM_ESPI 0x3487 -#define PCI_DID_INTEL_ICL_SUPER_Y_ESPI 0x3486 #define PCI_DID_INTEL_CMP_SUPER_U_LPC 0x0281 #define PCI_DID_INTEL_CMP_PREMIUM_Y_LPC 0x0283 #define PCI_DID_INTEL_CMP_PREMIUM_U_LPC 0x0284 @@ -3904,22 +3897,6 @@ #define PCI_DID_INTEL_CFL_S_GT2_3 0x3e9a #define PCI_DID_INTEL_CFL_S_GT2_4 0x3e91 #define PCI_DID_INTEL_CFL_S_GT2_5 0x3e96 -#define PCI_DID_INTEL_ICL_GT0_ULT 0x8A70 -#define PCI_DID_INTEL_ICL_GT0_5_ULT 0x8A71 -#define PCI_DID_INTEL_ICL_GT1_ULT 0x8A40 -#define PCI_DID_INTEL_ICL_GT2_ULX_0 0x8A50 -#define PCI_DID_INTEL_ICL_GT2_ULX_1 0x8A5D -#define PCI_DID_INTEL_ICL_GT2_ULT_1 0x8A5B -#define PCI_DID_INTEL_ICL_GT2_ULX_2 0x8A5C -#define PCI_DID_INTEL_ICL_GT2_ULT_2 0x8A5A -#define PCI_DID_INTEL_ICL_GT2_ULX_3 0x8A51 -#define PCI_DID_INTEL_ICL_GT2_ULT_3 0x8A52 -#define PCI_DID_INTEL_ICL_GT2_ULX_4 0x8A53 -#define PCI_DID_INTEL_ICL_GT2_ULT_4 0x8A54 -#define PCI_DID_INTEL_ICL_GT2_ULX_5 0x8A55 -#define PCI_DID_INTEL_ICL_GT2_ULT_5 0x8A56 -#define PCI_DID_INTEL_ICL_GT2_ULX_6 0x8A57 -#define PCI_DID_INTEL_ICL_GT3_ULT 0x8A62 #define PCI_DID_INTEL_CML_GT1_ULT_1 0x9B21 #define PCI_DID_INTEL_CML_GT1_ULT_2 0x9B2A #define PCI_DID_INTEL_CML_GT2_ULT_1 0x9B41 @@ -4050,10 +4027,6 @@ #define PCI_DID_INTEL_CFL_ID_S_S_4 0x3e33 #define PCI_DID_INTEL_CFL_ID_S_S_6 0x3eca #define PCI_DID_INTEL_CFL_ID_S_S_8 0x3e32 -#define PCI_DID_INTEL_ICL_ID_U 0x8A12 -#define PCI_DID_INTEL_ICL_ID_U_2_2 0x8A02 -#define PCI_DID_INTEL_ICL_ID_Y 0x8A10 -#define PCI_DID_INTEL_ICL_ID_Y_2 0x8A00 #define PCI_DID_INTEL_CML_ULT 0x9B61 #define PCI_DID_INTEL_CML_ULT_2_2 0x9B71 #define PCI_DID_INTEL_CML_ULT_6_2 0x9B51 @@ -4210,7 +4183,6 @@ #define PCI_DID_INTEL_KBL_P2SB 0xa2a0 #define PCI_DID_INTEL_CNL_P2SB 0x9da0 #define PCI_DID_INTEL_CNP_H_P2SB 0xa320 -#define PCI_DID_INTEL_ICL_P2SB 0x34a0 #define PCI_DID_INTEL_CMP_P2SB 0x02a0 #define PCI_DID_INTEL_CMP_H_P2SB 0x06a0 #define PCI_DID_INTEL_TGL_P2SB 0xa0a0 @@ -4230,7 +4202,6 @@ #define PCI_DID_INTEL_GLK_SRAM 0x31ec #define PCI_DID_INTEL_CNL_SRAM 0x9def #define PCI_DID_INTEL_CNP_H_SRAM 0xa36f -#define PCI_DID_INTEL_ICL_SRAM 0x34ef #define PCI_DID_INTEL_CMP_SRAM 0x02ef #define PCI_DID_INTEL_CMP_H_SRAM 0x06ef #define PCI_DID_INTEL_TGL_H_SRAM 0x43ef @@ -4252,7 +4223,6 @@ #define PCI_DID_INTEL_LWB_AUDIO_SUPER 0xa270 #define PCI_DID_INTEL_KBL_AUDIO 0x9d71 #define PCI_DID_INTEL_CNP_H_AUDIO 0xa348 -#define PCI_DID_INTEL_ICL_AUDIO 0x34c8 #define PCI_DID_INTEL_CMP_AUDIO 0x02c8 #define PCI_DID_INTEL_CMP_H_AUDIO 0x06c8 #define PCI_DID_INTEL_BSW_AUDIO 0x2284 @@ -4302,7 +4272,6 @@ #define PCI_DID_INTEL_LWB_CSE1_SUPER 0xa23b #define PCI_DID_INTEL_LWB_CSE2_SUPER 0xa23e #define PCI_DID_INTEL_CNP_H_CSE0 0xa360 -#define PCI_DID_INTEL_ICL_CSE0 0x34e0 #define PCI_DID_INTEL_CMP_CSE0 0x02e0 #define PCI_DID_INTEL_CMP_H_CSE0 0x06e0 #define PCI_DID_INTEL_TGL_CSE0 0xa0e0 @@ -4358,7 +4327,6 @@ #define PCI_DID_INTEL_SKL_SD 0x9d2d #define PCI_DID_INTEL_CNL_SD 0x9df5 #define PCI_DID_INTEL_CNP_H_SD 0xa375 -#define PCI_DID_INTEL_ICL_SD 0x34f8 #define PCI_DID_INTEL_CMP_SD 0x02f5 #define PCI_DID_INTEL_CMP_H_SD 0x06f5 #define PCI_DID_INTEL_MCC_SD 0x4b48 @@ -4456,7 +4424,6 @@ #define PCI_DID_INTEL_CNL_LP_CNVI_WIFI 0x9df0 #define PCI_DID_INTEL_CNL_H_CNVI_WIFI 0xa370 #define PCI_DID_INTEL_GLK_CNVI_WIFI 0x31dc -#define PCI_DID_INTEL_ICL_CNVI_WIFI 0x34f0 #define PCI_DID_INTEL_JSL_CNVI_WIFI_0 0x4df0 #define PCI_DID_INTEL_JSL_CNVI_WIFI_1 0x4df1 #define PCI_DID_INTEL_JSL_CNVI_WIFI_2 0x4df2 |