diff options
Diffstat (limited to 'src/mainboard/amd/tilapia_fam10/romstage.c')
| -rw-r--r-- | src/mainboard/amd/tilapia_fam10/romstage.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index 89e72eb8f70b..0e60fc5c75a3 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -35,6 +35,7 @@ #include <cpu/x86/bist.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8718f/it8718f.h> +#include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/car.h> #include <southbridge/amd/sb700/sb700.h> @@ -152,7 +153,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb7xx_51xx_early_setup(); #if IS_ENABLED(CONFIG_SET_FIDVID) - msr = rdmsr(0xc0010071); + msr = rdmsr(MSR_COFVID_STS); printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); /* FIXME: The sb fid change may survive the warm reset and only @@ -170,7 +171,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x3A); /* show final fid and vid */ - msr = rdmsr(0xc0010071); + msr = rdmsr(MSR_COFVID_STS); printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); #endif |