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-rw-r--r--src/mainboard/amd/torpedo/Oem.h2
-rw-r--r--src/mainboard/amd/torpedo/mainboard.c4
-rw-r--r--src/mainboard/amd/torpedo/mptable.c2
-rw-r--r--src/mainboard/amd/torpedo/platform_cfg.h6
4 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/amd/torpedo/Oem.h b/src/mainboard/amd/torpedo/Oem.h
index 037ce94ef881..4acc13660519 100644
--- a/src/mainboard/amd/torpedo/Oem.h
+++ b/src/mainboard/amd/torpedo/Oem.h
@@ -20,7 +20,7 @@
#define BIOS_SIZE 0x04 //04 - 1MB
#endif
#define LEGACY_FREE 0x00
-#if CONFIG_ONBOARD_USB30 == 0
+#if !CONFIG_ONBOARD_USB30
#define XHCI_SUPPORT 0x01
#endif
diff --git a/src/mainboard/amd/torpedo/mainboard.c b/src/mainboard/amd/torpedo/mainboard.c
index 21521539362b..7248bfb27f25 100644
--- a/src/mainboard/amd/torpedo/mainboard.c
+++ b/src/mainboard/amd/torpedo/mainboard.c
@@ -58,7 +58,7 @@ uint64_t uma_memory_base, uma_memory_size;
static void torpedo_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable. dev=0x%p\n", dev);
-#if (CONFIG_GFXUMA == 1)
+#if CONFIG_GFXUMA
msr_t msr, msr2;
uint32_t sys_mem;
@@ -107,7 +107,7 @@ int add_mainboard_resources(struct lb_memory *mem)
/* UMA is removed from system memory in the northbridge code, but
* in some circumstances we want the memory mentioned as reserved.
*/
-#if (CONFIG_GFXUMA == 1)
+#if CONFIG_GFXUMA
printk(BIOS_INFO, "uma_memory_start=0x%llx, uma_memory_size=0x%llx \n",
uma_memory_base, uma_memory_size);
lb_add_memory_range(mem, LB_MEM_RESERVED, uma_memory_base,
diff --git a/src/mainboard/amd/torpedo/mptable.c b/src/mainboard/amd/torpedo/mptable.c
index 936a41717c94..95137415b1cc 100644
--- a/src/mainboard/amd/torpedo/mptable.c
+++ b/src/mainboard/amd/torpedo/mptable.c
@@ -164,7 +164,7 @@ static void *smp_write_config_table(void *v)
/* PCI interrupts are level triggered, and are
* associated with a specific bus/device/function tuple.
*/
-#if CONFIG_GENERATE_ACPI_TABLES == 0
+#if !CONFIG_GENERATE_ACPI_TABLES
#define PCI_INT(bus, dev, int_sign, pin) \
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), apicid_sb900, (pin))
#else
diff --git a/src/mainboard/amd/torpedo/platform_cfg.h b/src/mainboard/amd/torpedo/platform_cfg.h
index cf31c6affd14..a6d02e8b781a 100644
--- a/src/mainboard/amd/torpedo/platform_cfg.h
+++ b/src/mainboard/amd/torpedo/platform_cfg.h
@@ -39,7 +39,7 @@
#define BIOS_SIZE_4M 3
#define BIOS_SIZE_8M 7
-#if CONFIG_COREBOOT_ROMSIZE_KB_1024 == 1
+#if CONFIG_COREBOOT_ROMSIZE_KB_1024
#define BIOS_SIZE BIOS_SIZE_1M
#elif CONFIG_COREBOOT_ROMSIZE_KB_2048 == 1
#define BIOS_SIZE BIOS_SIZE_2M
@@ -311,7 +311,7 @@
#define INCHIP_USB_CINFIG 0x7F
#define INCHIP_USB_OHCI1_CINFIG 0x01
#define INCHIP_USB_OHCI2_CINFIG 0x01
-#if CONFIG_ONBOARD_USB30 == 1
+#if CONFIG_ONBOARD_USB30
#define INCHIP_USB_OHCI3_CINFIG 0x00
#else
#define INCHIP_USB_OHCI3_CINFIG 0x01
@@ -985,7 +985,7 @@
* @li <b>0</b> - Disable
* @li <b>1</b> - Enable
*/
-#if CONFIG_ONBOARD_USB30 == 1
+#if CONFIG_ONBOARD_USB30
#define SB_XHCI_SWITCH 0
#else
#define SB_XHCI_SWITCH 1