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-rw-r--r--src/mainboard/asus/p5qpl-am/dsdt.asl44
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diff --git a/src/mainboard/asus/p5qpl-am/dsdt.asl b/src/mainboard/asus/p5qpl-am/dsdt.asl
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+++ b/src/mainboard/asus/p5qpl-am/dsdt.asl
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+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <southbridge/intel/i82801gx/i82801gx.h>
+
+#include <arch/acpi.h>
+DefinitionBlock(
+ "dsdt.aml",
+ "DSDT",
+ 0x02, // DSDT revision: ACPI v2.0 and up
+ OEM_ID,
+ ACPI_TABLE_CREATOR,
+ 0x20090419 // OEM revision
+)
+{
+ // global NVS and variables
+ #include "acpi/platform.asl"
+ #include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
+
+ Scope (\_SB) {
+ Device (PCI0)
+ {
+ #include <northbridge/intel/x4x/acpi/x4x.asl>
+ #include <southbridge/intel/i82801gx/acpi/ich7.asl>
+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
+ }
+ }
+
+ /* Chipset specific sleep states */
+ #include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+}