diff options
Diffstat (limited to 'src/mainboard/facebook/monolith/acpi/mainboard.asl')
| -rw-r--r-- | src/mainboard/facebook/monolith/acpi/mainboard.asl | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/src/mainboard/facebook/monolith/acpi/mainboard.asl b/src/mainboard/facebook/monolith/acpi/mainboard.asl new file mode 100644 index 000000000000..2a3ad59b9fe5 --- /dev/null +++ b/src/mainboard/facebook/monolith/acpi/mainboard.asl @@ -0,0 +1,42 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * Copyright (C) 2016 Intel Corporation. + * Copyright (C) 2018-2019 Eltan B.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Scope (\_SB) +{ + Device (PWRB) + { + Name (_HID, EisaId ("PNP0C0C")) + Name (_UID, 1) + } +} + +/* + * Onboard CPLD + */ +Scope (\_SB.PCI0.LPCB) +{ + Device (CPLD) /* Onboard CPLD */ + { + Name(_HID, EISAID("PNP0C01")) + Name(_CRS, ResourceTemplate() + { + /* Reserve 0x280 to 0x2BF for the CPLD */ + FixedIO (0x0280, 0x40) + IRQNoFlags () {7} + }) + } +} |