diff options
Diffstat (limited to 'src/mainboard/google/brya/variants/agah/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/brya/variants/agah/overridetree.cb | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/agah/overridetree.cb b/src/mainboard/google/brya/variants/agah/overridetree.cb index 2f79831fe625..97fa9905e4b4 100644 --- a/src/mainboard/google/brya/variants/agah/overridetree.cb +++ b/src/mainboard/google/brya/variants/agah/overridetree.cb @@ -30,8 +30,8 @@ chip soc/intel/alderlake }, }" - register "SaGv" = "SaGv_Enabled" - register "TcssAuxOri" = "1" + register "sagv" = "SaGv_Enabled" + register "tcss_aux_ori" = "1" register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2_C1 @@ -43,7 +43,7 @@ chip soc/intel/alderlake register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port A2 register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Disable M.2 WWAN - register "SerialIoI2cMode" = "{ + register "serial_io_i2c_mode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci, [PchSerialIoIndexI2C2] = PchSerialIoPci, @@ -52,7 +52,7 @@ chip soc/intel/alderlake [PchSerialIoIndexI2C5] = PchSerialIoPci, }" - register "SerialIoGSpiMode" = "{ + register "serial_io_gspi_mode" = "{ [PchSerialIoIndexGSPI0] = PchSerialIoDisabled, [PchSerialIoIndexGSPI1] = PchSerialIoDisabled, }" |