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Diffstat (limited to 'src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb')
-rw-r--r--src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
index 7c1d48aa148f..415c0c973ab8 100644
--- a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
+++ b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
@@ -140,6 +140,22 @@ chip soc/intel/elkhartlake
[PchSerialIoIndexUART2] = 1,
}"
+ register "fivr" = "{
+ .fivr_config_en = true,
+ .v1p05_state = FIVR_ENABLE_ALL_SX,
+ .vnn_state = FIVR_ENABLE_ALL_SX,
+ .vnn_sx_state = FIVR_ENABLE_S3_S4_S5,
+ .v1p05_rail = FIVR_VOLTAGE_NORMAL,
+ .vnn_rail = FIVR_ENABLE_ALL_VOLTAGE,
+ .v1p05_icc_max_ma = 200,
+ .vnn_sx_mv = 1050,
+ .vcc_low_high_us = 12,
+ .vcc_ret_high_us = 54,
+ .vcc_ret_low_us = 43,
+ .vcc_off_high_us = 150,
+ .spread_spectrum = 15,
+ }"
+
# TSN GBE related UPDs
register "PchTsnGbeLinkSpeed" = "Tsn_2_5_Gbps"
register "PchTsnGbeSgmiiEnable" = "1"