diff options
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/kblrvp/Kconfig | 3 | ||||
| -rw-r--r-- | src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/intel/kunimitsu/Kconfig | 3 | ||||
| -rw-r--r-- | src/mainboard/intel/kunimitsu/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/intel/saddlebrook/Kconfig | 3 |
5 files changed, 9 insertions, 2 deletions
diff --git a/src/mainboard/intel/kblrvp/Kconfig b/src/mainboard/intel/kblrvp/Kconfig index 2abf8329f6e3..6b60ac46eae4 100644 --- a/src/mainboard/intel/kblrvp/Kconfig +++ b/src/mainboard/intel/kblrvp/Kconfig @@ -31,6 +31,9 @@ config BOARD_INTEL_KBLRVP11 if BOARD_INTEL_KBLRVP_COMMON +config DISABLE_HECI1_AT_PRE_BOOT + default y + config VBOOT select VBOOT_LID_SWITCH diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb index e17c8b71f3c6..bae6198118a5 100644 --- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb @@ -20,7 +20,6 @@ chip soc/intel/skylake register "dptf_enable" = "1" # FSP Configuration - register "HeciEnabled" = "0" register "IoBufferOwnership" = "0" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/intel/kunimitsu/Kconfig b/src/mainboard/intel/kunimitsu/Kconfig index 85f9e54d82fd..22fffb020380 100644 --- a/src/mainboard/intel/kunimitsu/Kconfig +++ b/src/mainboard/intel/kunimitsu/Kconfig @@ -21,6 +21,9 @@ config BOARD_SPECIFIC_OPTIONS select SOC_INTEL_SKYLAKE select HAVE_SPD_IN_CBFS +config DISABLE_HECI1_AT_PRE_BOOT + default y + config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES select VBOOT_LID_SWITCH diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index ba4835eb2558..deb9f38c7a72 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -25,7 +25,6 @@ chip soc/intel/skylake register "IoBufferOwnership" = "3" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" - register "HeciEnabled" = "0" register "SaGv" = "SaGv_Enabled" # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch diff --git a/src/mainboard/intel/saddlebrook/Kconfig b/src/mainboard/intel/saddlebrook/Kconfig index decbb9688a8d..5d16d228756b 100644 --- a/src/mainboard/intel/saddlebrook/Kconfig +++ b/src/mainboard/intel/saddlebrook/Kconfig @@ -16,6 +16,9 @@ config BOARD_SPECIFIC_OPTIONS select HAVE_CMOS_DEFAULT select MAINBOARD_USES_IFD_GBE_REGION +config DISABLE_HECI1_AT_PRE_BOOT + default y + config MAINBOARD_DIR default "intel/saddlebrook" |