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Diffstat (limited to 'src/mainboard/system76/tgl-h/variants/oryp8/overridetree.cb')
-rw-r--r--src/mainboard/system76/tgl-h/variants/oryp8/overridetree.cb4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/system76/tgl-h/variants/oryp8/overridetree.cb b/src/mainboard/system76/tgl-h/variants/oryp8/overridetree.cb
index 6f25d7bb7c0f..a09cf30cad2b 100644
--- a/src/mainboard/system76/tgl-h/variants/oryp8/overridetree.cb
+++ b/src/mainboard/system76/tgl-h/variants/oryp8/overridetree.cb
@@ -62,21 +62,18 @@ chip soc/intel/tigerlake
end
device ref pcie_rp5 on
# PCIe root port #5 x1, Clock 8 (GLAN)
- register "PcieRpEnable[4]" = "1"
register "PcieRpLtrEnable[4]" = "1"
register "PcieClkSrcUsage[8]" = "4"
register "PcieClkSrcClkReq[8]" = "8"
end
device ref pcie_rp6 on
# PCIe root port #6 x1, Clock 10 (CARD)
- register "PcieRpEnable[5]" = "1"
register "PcieRpLtrEnable[5]" = "1"
register "PcieClkSrcUsage[10]" = "5"
register "PcieClkSrcClkReq[10]" = "10"
end
device ref pcie_rp8 on
# PCIe root port #8 x1, Clock 2 (WLAN)
- register "PcieRpEnable[7]" = "1"
register "PcieRpLtrEnable[7]" = "1"
register "PcieClkSrcUsage[2]" = "7"
register "PcieClkSrcClkReq[2]" = "2"
@@ -84,7 +81,6 @@ chip soc/intel/tigerlake
end
device ref pcie_rp9 on
# PCIe root port #9 x4, Clock 6 (SSD2)
- register "PcieRpEnable[8]" = "1"
register "PcieRpLtrEnable[8]" = "1"
register "PcieClkSrcUsage[6]" = "8"
register "PcieClkSrcClkReq[6]" = "6"