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-rw-r--r--src/mainboard/tyan/s2912_fam10/Kconfig4
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c2
2 files changed, 4 insertions, 2 deletions
diff --git a/src/mainboard/tyan/s2912_fam10/Kconfig b/src/mainboard/tyan/s2912_fam10/Kconfig
index a03176b2e359..30facb978216 100644
--- a/src/mainboard/tyan/s2912_fam10/Kconfig
+++ b/src/mainboard/tyan/s2912_fam10/Kconfig
@@ -105,4 +105,8 @@ config HEAP_SIZE
hex
default 0xc0000
+config MCP55_PCI_E_X_0
+ int
+ default 1
+
endif # BOARD_TYAN_S2912_FAM10
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index a3ffff902e4c..49bcd1af8b0d 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -79,8 +79,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/quadcore/quadcore.c"
-#define MCP55_PCI_E_X_0 1
-
#define MCP55_MB_SETUP \
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+37, 0x00, 0x44,/* GPIO38 PCI_REQ3 */ \
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+38, 0x00, 0x44,/* GPIO39 PCI_GNT3 */ \