diff options
Diffstat (limited to 'src/northbridge/intel/ironlake')
| -rw-r--r-- | src/northbridge/intel/ironlake/early_init.c | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/ironlake/ironlake.h | 2 |
2 files changed, 0 insertions, 6 deletions
diff --git a/src/northbridge/intel/ironlake/early_init.c b/src/northbridge/intel/ironlake/early_init.c index 1e4d0dcc10d3..b76541727497 100644 --- a/src/northbridge/intel/ironlake/early_init.c +++ b/src/northbridge/intel/ironlake/early_init.c @@ -106,10 +106,6 @@ void ironlake_early_initialization(int chipset_type) early_cpu_init(); - pci_write_config32(PCI_DEV(0, 0x16, 0), 0x10, (uintptr_t)DEFAULT_HECIBAR); - pci_write_config32(PCI_DEV(0, 0x16, 0), PCI_COMMAND, - PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); - /* Magic for S3 resume. Must be done early. */ if (s3_resume) { mchbar_clrsetbits32(0x1e8, 1, 6); diff --git a/src/northbridge/intel/ironlake/ironlake.h b/src/northbridge/intel/ironlake/ironlake.h index 9a8b21e00320..be5f11ba14d1 100644 --- a/src/northbridge/intel/ironlake/ironlake.h +++ b/src/northbridge/intel/ironlake/ironlake.h @@ -3,8 +3,6 @@ #ifndef __NORTHBRIDGE_INTEL_IRONLAKE_IRONLAKE_H__ #define __NORTHBRIDGE_INTEL_IRONLAKE_IRONLAKE_H__ -#define DEFAULT_HECIBAR ((u8 *)0xfed17000) - /* * D1:F0 PEG */ |