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Diffstat (limited to 'src/northbridge/intel/x4x/memmap.c')
-rw-r--r--src/northbridge/intel/x4x/memmap.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/x4x/memmap.c b/src/northbridge/intel/x4x/memmap.c
index 8a69ba80a861..db0ab9c9fbc6 100644
--- a/src/northbridge/intel/x4x/memmap.c
+++ b/src/northbridge/intel/x4x/memmap.c
@@ -72,7 +72,7 @@ int decode_pcie_bar(u32 *const base, u32 *const len)
{0, 0},
};
- const u32 pciexbar_reg = pci_read_config32(PCI_DEV(0, 0, 0), D0F0_PCIEXBAR_LO);
+ const u32 pciexbar_reg = pci_read_config32(HOST_BRIDGE, D0F0_PCIEXBAR_LO);
if (!(pciexbar_reg & 1)) {
printk(BIOS_WARNING, "WARNING: MMCONF not set\n");
@@ -95,13 +95,13 @@ int decode_pcie_bar(u32 *const base, u32 *const len)
static size_t northbridge_get_tseg_size(void)
{
- const u8 esmramc = pci_read_config8(PCI_DEV(0, 0, 0), D0F0_ESMRAMC);
+ const u8 esmramc = pci_read_config8(HOST_BRIDGE, D0F0_ESMRAMC);
return decode_tseg_size(esmramc);
}
static uintptr_t northbridge_get_tseg_base(void)
{
- return pci_read_config32(PCI_DEV(0, 0, 0), D0F0_TSEG);
+ return pci_read_config32(HOST_BRIDGE, D0F0_TSEG);
}