diff options
Diffstat (limited to 'src/soc/amd/cezanne/early_fch.c')
-rw-r--r-- | src/soc/amd/cezanne/early_fch.c | 15 |
1 files changed, 3 insertions, 12 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c index 7782d43fdd9a..69458b6220da 100644 --- a/src/soc/amd/cezanne/early_fch.c +++ b/src/soc/amd/cezanne/early_fch.c @@ -32,22 +32,16 @@ static void reset_i2c_peripherals(void) sb_reset_i2c_peripherals(&reset_info); } -/* Initialize port80h routing early if needed */ -void configure_port80_routing_early(void) -{ - if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) { - mb_set_up_early_espi(); - espi_setup(); - } -} - /* Before console init */ void fch_pre_init(void) { /* Enable_acpimmio_decode_pm04 to enable the ACPIMMIO decode which is needed to access the GPIO registers. */ enable_acpimmio_decode_pm04(); + /* Setup SPI base by calling lpc_early_init before setting up eSPI. */ lpc_early_init(); + /* Setup eSPI to enable port80 routing. */ + configure_espi(); fch_spi_early_init(); fch_smbus_init(); fch_enable_cf9_io(); @@ -80,7 +74,4 @@ void fch_early_init(void) if (CONFIG(DISABLE_SPI_FLASH_ROM_SHARING)) lpc_disable_spi_rom_sharing(); - - if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI) && !CONFIG(NO_EARLY_BOOTBLOCK_POSTCODES)) - espi_setup(); } |