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Diffstat (limited to 'src/soc/intel/apollolake/cpu.c')
-rw-r--r--src/soc/intel/apollolake/cpu.c18
1 files changed, 7 insertions, 11 deletions
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index 33496273d2a3..0022b3a6eaff 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -72,10 +72,12 @@ static const struct reg_script core_msr_script[] = {
void soc_core_init(struct device *cpu)
{
+ config_t *conf = config_of_soc();
+
/* Clear out pending MCEs */
/* TODO(adurbin): Some of these banks are core vs package
scope. For now every CPU clears every bank. */
- if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX) ||
+ if ((CONFIG(SOC_INTEL_COMMON_BLOCK_SGX) && conf->sgx_enable) ||
acpi_get_sleep_type() == ACPI_S5)
mca_configure();
@@ -89,7 +91,7 @@ void soc_core_init(struct device *cpu)
enable_pm_timer_emulation();
/* Configure Core PRMRR for SGX. */
- if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX))
+ if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX) && conf->sgx_enable)
prmrr_core_configure();
/* Set Max Non-Turbo ratio if RAPL is disabled. */
@@ -253,9 +255,11 @@ static void relocation_handler(int cpu, uintptr_t curr_smbase,
static void post_mp_init(void)
{
+ config_t *conf = config_of_soc();
+
smm_southbridge_enable(PWRBTN_EN | GBL_EN);
- if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX))
+ if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX) && conf->sgx_enable)
mp_run_on_all_cpus(sgx_configure, NULL);
}
@@ -293,11 +297,3 @@ void cpu_lock_sgx_memory(void)
/* Do nothing because MCHECK while loading microcode and enabling
* IA untrusted mode takes care of necessary locking */
}
-
-int soc_fill_sgx_param(struct sgx_param *sgx_param)
-{
- config_t *conf = config_of_soc();
-
- sgx_param->enable = conf->sgx_enable;
- return 0;
-}